X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gcc%2Fregmove.c;h=25fcc52b213b3ce35ce618b7d6ec44ded9afbad8;hb=7a50adb78fc252c3fcd01ca0f199b8ec914c3f67;hp=9342cade6249080bced50ae9a3ec43b502b2fdfb;hpb=c8a05f7c57e777538fe893ba95817c6d2f8b7738;p=gcc.git diff --git a/gcc/regmove.c b/gcc/regmove.c index 9342cade624..25fcc52b213 100644 --- a/gcc/regmove.c +++ b/gcc/regmove.c @@ -44,28 +44,34 @@ along with GCC; see the file COPYING3. If not see #include "timevar.h" #include "tree-pass.h" #include "df.h" +#include "ira.h" -static int perhaps_ends_bb_p (rtx); static int optimize_reg_copy_1 (rtx, rtx, rtx); static void optimize_reg_copy_2 (rtx, rtx, rtx); static void optimize_reg_copy_3 (rtx, rtx, rtx); static void copy_src_to_dest (rtx, rtx, rtx); +enum match_use +{ + READ, + WRITE, + READWRITE +}; + struct match { int with[MAX_RECOG_OPERANDS]; - enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS]; + enum match_use use[MAX_RECOG_OPERANDS]; int commutative[MAX_RECOG_OPERANDS]; int early_clobber[MAX_RECOG_OPERANDS]; }; static int find_matches (rtx, struct match *); -static int regclass_compatible_p (int, int); static int fixup_match_2 (rtx, rtx, rtx, rtx); /* Return nonzero if registers with CLASS1 and CLASS2 can be merged without causing too much register allocation problems. */ static int -regclass_compatible_p (int class0, int class1) +regclass_compatible_p (enum reg_class class0, enum reg_class class1) { return (class0 == class1 || (reg_class_subset_p (class0, class1) @@ -100,7 +106,7 @@ find_use_as_address (rtx x, rtx reg, HOST_WIDE_INT plusconst) if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS && XEXP (XEXP (x, 0), 0) == reg - && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT + && CONST_INT_P (XEXP (XEXP (x, 0), 1)) && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst) return x; @@ -179,7 +185,9 @@ try_auto_increment (rtx insn, rtx inc_insn, rtx inc_insn_set, rtx reg, &SET_SRC (inc_insn_set), XEXP (SET_SRC (inc_insn_set), 0), 1); validate_change (insn, &XEXP (use, 0), - gen_rtx_fmt_e (inc_code, Pmode, reg), 1); + gen_rtx_fmt_e (inc_code, + GET_MODE (XEXP (use, 0)), reg), + 1); if (apply_change_group ()) { /* If there is a REG_DEAD note on this insn, we must @@ -190,7 +198,7 @@ try_auto_increment (rtx insn, rtx inc_insn, rtx inc_insn_set, rtx reg, changed. */ rtx note = find_reg_note (insn, REG_DEAD, reg); if (note) - PUT_MODE (note, REG_UNUSED); + PUT_REG_NOTE_KIND (note, REG_UNUSED); add_reg_note (insn, REG_INC, reg); @@ -208,30 +216,6 @@ try_auto_increment (rtx insn, rtx inc_insn, rtx inc_insn_set, rtx reg, static int *regno_src_regno; - -/* Return 1 if INSN might end a basic block. */ - -static int perhaps_ends_bb_p (rtx insn) -{ - switch (GET_CODE (insn)) - { - case CODE_LABEL: - case JUMP_INSN: - /* These always end a basic block. */ - return 1; - - case CALL_INSN: - /* A CALL_INSN might be the last insn of a basic block, if it is inside - an EH region or if there are nonlocal gotos. Note that this test is - very conservative. */ - if (nonlocal_goto_handler_labels) - return 1; - /* Fall through. */ - default: - return can_throw_internal (insn); - } -} - /* INSN is a copy from SRC to DEST, both registers, and SRC does not die in INSN. @@ -251,6 +235,7 @@ optimize_reg_copy_1 (rtx insn, rtx dest, rtx src) rtx dest_death = 0; int sregno = REGNO (src); int dregno = REGNO (dest); + basic_block bb = BLOCK_FOR_INSN (insn); /* We don't want to mess with hard regs if register classes are small. */ if (sregno == dregno @@ -264,12 +249,10 @@ optimize_reg_copy_1 (rtx insn, rtx dest, rtx src) for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) { - /* ??? We can't scan past the end of a basic block without updating - the register lifetime info (REG_DEAD/basic_block_live_at_start). */ - if (perhaps_ends_bb_p (p)) - break; - else if (! INSN_P (p)) + if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; if (reg_set_p (src, p) || reg_set_p (dest, p) /* If SRC is an asm-declared register, it must not be replaced @@ -323,7 +306,7 @@ optimize_reg_copy_1 (rtx insn, rtx dest, rtx src) if (sregno < FIRST_PSEUDO_REGISTER && reg_mentioned_p (dest, PATTERN (q))) failed = 1; - + /* Attempt to replace all uses. */ else if (!validate_replace_rtx (src, dest, q)) failed = 1; @@ -341,9 +324,12 @@ optimize_reg_copy_1 (rtx insn, rtx dest, rtx src) /* For SREGNO, count the total number of insns scanned. For DREGNO, count the total number of insns scanned after passing the death note for DREGNO. */ - s_length++; - if (dest_death) - d_length++; + if (!DEBUG_INSN_P (p)) + { + s_length++; + if (dest_death) + d_length++; + } /* If the insn in which SRC dies is a CALL_INSN, don't count it as a call that has been crossed. Otherwise, count it. */ @@ -457,15 +443,14 @@ optimize_reg_copy_2 (rtx insn, rtx dest, rtx src) rtx set; int sregno = REGNO (src); int dregno = REGNO (dest); + basic_block bb = BLOCK_FOR_INSN (insn); for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) { - /* ??? We can't scan past the end of a basic block without updating - the register lifetime info (REG_DEAD/basic_block_live_at_start). */ - if (perhaps_ends_bb_p (p)) - break; - else if (! INSN_P (p)) + if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; set = single_set (p); if (set && SET_SRC (set) == dest && SET_DEST (set) == src @@ -530,6 +515,7 @@ optimize_reg_copy_3 (rtx insn, rtx dest, rtx src) int dst_no = REGNO (dest); rtx p, set; enum machine_mode old_mode; + basic_block bb = BLOCK_FOR_INSN (insn); if (src_no < FIRST_PSEUDO_REGISTER || dst_no < FIRST_PSEUDO_REGISTER @@ -537,13 +523,12 @@ optimize_reg_copy_3 (rtx insn, rtx dest, rtx src) || REG_N_DEATHS (src_no) != 1 || REG_N_SETS (src_no) != 1) return; + for (p = PREV_INSN (insn); p && ! reg_set_p (src_reg, p); p = PREV_INSN (p)) - /* ??? We can't scan past the end of a basic block without updating - the register lifetime info (REG_DEAD/basic_block_live_at_start). */ - if (perhaps_ends_bb_p (p)) + if (INSN_P (p) && BLOCK_FOR_INSN (p) != bb) break; - if (! p) + if (! p || BLOCK_FOR_INSN (p) != bb) return; if (! (set = single_set (p)) @@ -620,8 +605,6 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest) rtx *p_move_notes; int src_regno; int dest_regno; - int insn_uid; - int move_uid; /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is @@ -677,9 +660,6 @@ copy_src_to_dest (rtx insn, rtx src, rtx dest) *p_move_notes = NULL_RTX; *p_insn_notes = NULL_RTX; - insn_uid = INSN_UID (insn); - move_uid = INSN_UID (move_insn); - /* Update the various register tables. */ dest_regno = REGNO (dest); INC_REG_N_SETS (dest_regno, 1); @@ -767,6 +747,7 @@ fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset) { rtx p, dst_death = 0; int length, num_calls = 0, freq_calls = 0; + basic_block bb = BLOCK_FOR_INSN (insn); /* If SRC dies in INSN, we'd have to move the death note. This is considered to be very unlikely, so we just skip the optimization @@ -780,23 +761,21 @@ fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset) { rtx pset; - /* ??? We can't scan past the end of a basic block without updating - the register lifetime info (REG_DEAD/basic_block_live_at_start). */ - if (perhaps_ends_bb_p (p)) - break; - else if (! INSN_P (p)) + if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; if (find_regno_note (p, REG_DEAD, REGNO (dst))) dst_death = p; - if (! dst_death) + if (! dst_death && !DEBUG_INSN_P (p)) length++; pset = single_set (p); if (pset && SET_DEST (pset) == dst && GET_CODE (SET_SRC (pset)) == PLUS && XEXP (SET_SRC (pset), 0) == src - && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT) + && CONST_INT_P (XEXP (SET_SRC (pset), 1))) { HOST_WIDE_INT newconst = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1)); @@ -821,11 +800,10 @@ fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset) #ifdef AUTO_INC_DEC for (p = PREV_INSN (insn); p; p = PREV_INSN (p)) { - if (LABEL_P (p) - || JUMP_P (p)) - break; if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; if (reg_overlap_mentioned_p (dst, PATTERN (p))) { if (try_auto_increment (p, insn, 0, dst, newconst, 0)) @@ -835,11 +813,10 @@ fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset) } for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) { - if (LABEL_P (p) - || JUMP_P (p)) - break; if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; if (reg_overlap_mentioned_p (dst, PATTERN (p))) { try_auto_increment (p, insn, 0, dst, newconst, 1); @@ -882,65 +859,35 @@ fixup_match_2 (rtx insn, rtx dst, rtx src, rtx offset) return 0; } -/* Main entry for the register move optimization. - F is the first instruction. - NREGS is one plus the highest pseudo-reg number used in the instruction. - REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken - (or 0 if none should be output). */ +/* A forward pass. Replace output operands with input operands. */ static void -regmove_optimize (rtx f, int nregs) +regmove_forward_pass (void) { + basic_block bb; rtx insn; - struct match match; - int pass; - int i; - rtx copy_src, copy_dst; - /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily - confused by non-call exceptions ending blocks. */ - if (flag_non_call_exceptions) + if (! flag_expensive_optimizations) return; - df_note_add_problem (); - df_analyze (); - - regstat_init_n_sets_and_refs (); - regstat_compute_ri (); - - regno_src_regno = XNEWVEC (int, nregs); - for (i = nregs; --i >= 0; ) - regno_src_regno[i] = -1; - - /* A forward/backward pass. Replace output operands with input operands. */ + if (dump_file) + fprintf (dump_file, "Starting forward pass...\n"); - for (pass = 0; pass <= 2; pass++) + FOR_EACH_BB (bb) { - if (! flag_regmove && pass >= flag_expensive_optimizations) - goto done; - - if (dump_file) - fprintf (dump_file, "Starting %s pass...\n", - pass ? "backward" : "forward"); - - for (insn = pass ? get_last_insn () : f; insn; - insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn)) + FOR_BB_INSNS (bb, insn) { - rtx set; - - set = single_set (insn); + rtx set = single_set (insn); if (! set) continue; - if (flag_expensive_optimizations && ! pass - && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND - || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) + if ((GET_CODE (SET_SRC (set)) == SIGN_EXTEND + || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) && REG_P (XEXP (SET_SRC (set), 0)) && REG_P (SET_DEST (set))) optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); - if (flag_expensive_optimizations && ! pass - && REG_P (SET_SRC (set)) + if (REG_P (SET_SRC (set)) && REG_P (SET_DEST (set))) { /* If this is a register-register copy where SRC is not dead, @@ -965,19 +912,33 @@ regmove_optimize (rtx f, int nregs) } } } +} - /* A backward pass. Replace input operands with output operands. */ +/* A backward pass. Replace input operands with output operands. */ + +static void +regmove_backward_pass (void) +{ + basic_block bb; + rtx insn, prev; if (dump_file) fprintf (dump_file, "Starting backward pass...\n"); - for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) + FOR_EACH_BB_REVERSE (bb) { - if (INSN_P (insn)) + /* ??? Use the safe iterator because fixup_match_2 can remove + insns via try_auto_increment. */ + FOR_BB_INSNS_REVERSE_SAFE (bb, insn, prev) { + struct match match; + rtx copy_src, copy_dst; int op_no, match_no; int success = 0; + if (! INSN_P (insn)) + continue; + if (! find_matches (insn, &match)) continue; @@ -1055,7 +1016,7 @@ regmove_optimize (rtx f, int nregs) if (REGNO (src) < FIRST_PSEUDO_REGISTER) { if (GET_CODE (SET_SRC (set)) == PLUS - && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT + && CONST_INT_P (XEXP (SET_SRC (set), 1)) && XEXP (SET_SRC (set), 0) == src && fixup_match_2 (insn, dst, src, XEXP (SET_SRC (set), 1))) @@ -1130,15 +1091,13 @@ regmove_optimize (rtx f, int nregs) { rtx pset; - /* ??? We can't scan past the end of a basic block without - updating the register lifetime info - (REG_DEAD/basic_block_live_at_start). */ - if (perhaps_ends_bb_p (p)) - break; - else if (! INSN_P (p)) + if (! INSN_P (p)) continue; + if (BLOCK_FOR_INSN (p) != bb) + break; - length++; + if (!DEBUG_INSN_P (p)) + length++; /* ??? See if all of SRC is set in P. This test is much more conservative than it needs to be. */ @@ -1146,35 +1105,41 @@ regmove_optimize (rtx f, int nregs) if (pset && SET_DEST (pset) == src) { /* We use validate_replace_rtx, in case there - are multiple identical source operands. All of - them have to be changed at the same time. */ + are multiple identical source operands. All + of them have to be changed at the same time: + when validate_replace_rtx() calls + apply_change_group(). */ + validate_change (p, &SET_DEST (pset), dst, 1); if (validate_replace_rtx (src, dst, insn)) - { - if (validate_change (p, &SET_DEST (pset), - dst, 0)) - success = 1; - else - { - /* Change all source operands back. - This modifies the dst as a side-effect. */ - validate_replace_rtx (dst, src, insn); - /* Now make sure the dst is right. */ - validate_change (insn, - recog_data.operand_loc[match_no], - dst, 0); - } - } + success = 1; break; } - /* We can't make this change if SRC is read or + /* We can't make this change if DST is mentioned at + all in P, since we are going to change its value. + We can't make this change if SRC is read or partially written in P, since we are going to - eliminate SRC. We can't make this change - if DST is mentioned at all in P, - since we are going to change its value. */ - if (reg_overlap_mentioned_p (src, PATTERN (p)) - || reg_mentioned_p (dst, PATTERN (p))) - break; + eliminate SRC. However, if it's a debug insn, we + can't refrain from making the change, for this + would cause codegen differences, so instead we + invalidate debug expressions that reference DST, + and adjust references to SRC in them so that they + become references to DST. */ + if (reg_mentioned_p (dst, PATTERN (p))) + { + if (DEBUG_INSN_P (p)) + validate_change (p, &INSN_VAR_LOCATION_LOC (p), + gen_rtx_UNKNOWN_VAR_LOC (), 1); + else + break; + } + if (reg_overlap_mentioned_p (src, PATTERN (p))) + { + if (DEBUG_INSN_P (p)) + validate_replace_rtx_group (src, dst, p); + else + break; + } /* If we have passed a call instruction, and the pseudo-reg DST is not already live across a call, @@ -1236,6 +1201,8 @@ regmove_optimize (rtx f, int nregs) break; } + else if (num_changes_pending () > 0) + cancel_changes (0); } /* If we weren't able to replace any of the alternatives, try an @@ -1244,8 +1211,35 @@ regmove_optimize (rtx f, int nregs) copy_src_to_dest (insn, copy_src, copy_dst); } } +} + +/* Main entry for the register move optimization. */ + +static unsigned int +regmove_optimize (void) +{ + int i; + int nregs = max_reg_num (); + + df_note_add_problem (); + df_analyze (); + + if (flag_ira_loop_pressure) + ira_set_pseudo_classes (dump_file); + + regstat_init_n_sets_and_refs (); + regstat_compute_ri (); + + regno_src_regno = XNEWVEC (int, nregs); + for (i = nregs; --i >= 0; ) + regno_src_regno[i] = -1; + + /* A forward pass. Replace output operands with input operands. */ + regmove_forward_pass (); + + /* A backward pass. Replace input operands with output operands. */ + regmove_backward_pass (); - done: /* Clean up. */ free (regno_src_regno); if (reg_set_in_bb) @@ -1255,6 +1249,9 @@ regmove_optimize (rtx f, int nregs) } regstat_free_n_sets_and_refs (); regstat_free_ri (); + if (flag_ira_loop_pressure) + free_reg_info (); + return 0; } /* Returns nonzero if INSN's pattern has matching constraints for any operand. @@ -1356,14 +1353,6 @@ gate_handle_regmove (void) return (optimize > 0 && flag_regmove); } -/* Register allocation pre-pass, to reduce number of moves necessary - for two-address machines. */ -static unsigned int -rest_of_handle_regmove (void) -{ - regmove_optimize (get_insns (), max_reg_num ()); - return 0; -} struct rtl_opt_pass pass_regmove = { @@ -1371,7 +1360,7 @@ struct rtl_opt_pass pass_regmove = RTL_PASS, "regmove", /* name */ gate_handle_regmove, /* gate */ - rest_of_handle_regmove, /* execute */ + regmove_optimize, /* execute */ NULL, /* sub */ NULL, /* next */ 0, /* static_pass_number */ @@ -1385,4 +1374,3 @@ struct rtl_opt_pass pass_regmove = TODO_ggc_collect /* todo_flags_finish */ } }; -