X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gcc%2Ftestsuite%2FChangeLog;h=282a3bebf0c828ce2c32a43c40f79c652eaddfa5;hb=fc7a823e1507110aba804cf94415155a8783e698;hp=e5083f65bf13a8fbff96041afef45cfbdc955c8c;hpb=d51a6714b93b8a3c85e69003d74782140cd9b763;p=gcc.git diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e5083f65bf1..282a3bebf0c 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,354 @@ +2015-05-28 Eric Botcazou + + * gnat.dg/varsize_temp.adb: Rename into... + * gnat.dg/varsize1.adb: ...this. + * gnat.dg/varsize_copy.ad[sb]: Rename into... + * gnat.dg/varsize2.ad[sb]: ...this. + * gnat.dg/varsize3_1.adb: New test. + * gnat.dg/varsize3_2.adb: Likewise. + * gnat.dg/varsize3_3.adb: Likewise. + * gnat.dg/varsize3_4.adb: Likewise. + * gnat.dg/varsize3_5.adb: Likewise. + * gnat.dg/varsize3_6.adb: Likewise. + * gnat.dg/varsize3_pkg1.ads: New helper. + * gnat.dg/varsize3_pkg2.ads: Likewise. + * gnat.dg/varsize3_pkg3.ads: Likewise. + +2015-05-28 Richard Biener + + * gcc.dg/vect/slp-reduc-sad.c: New testcase. + +2015-05-28 Richard Biener + + PR tree-optimization/66142 + * gcc.dg/tree-ssa/ssa-fre-44.c: Fixup. + +2015-05-28 Lawrence Velázquez + + PR target/63810 + * gcc.dg/darwin-minversion-3.c: Update testcase. + * gcc.dg/darwin-minversion-4.c: Ditto. + * gcc.dg/darwin-minversion-5.c: New testcase. + * gcc.dg/darwin-minversion-6.c: Ditto. + * gcc.dg/darwin-minversion-7.c: Ditto. + * gcc.dg/darwin-minversion-8.c: Ditto. + * gcc.dg/darwin-minversion-9.c: Ditto. + * gcc.dg/darwin-minversion-10.c: Ditto. + * gcc.dg/darwin-minversion-11.c: Ditto. + * gcc.dg/darwin-minversion-12.c: Ditto. + +2015-05-28 Thomas Preud'homme + + PR rtl-optimization/66168 + * gcc.c-torture/compile/pr66168.c: New test. + +2015-05-27 Jeff Law + + PR target/39726 + * gcc.dg/target/m68k/pr39726-1.c: New test. + +2015-05-27 Nathan Sidwell + + PR c++/66270 + * g++.dg/ext/alias-canon3.C: New. + +2015-05-27 Richard Biener + + PR tree-optimization/66272 + Revert parts of + 2014-08-15 Richard Biener + + PR tree-optimization/62031 + * gcc.dg/torture/pr66272.c: New testcase. + +2015-05-27 Richard Biener + + * gcc.dg/vect/slp-reduc-7.c: New testcase. + +2015-05-27 Honggyu Kim + + PR target/65358 + * gcc.dg/pr65358.c: New test. + +2015-05-27 Andre Vehreschild + + PR fortran/65548 + * gfortran.dg/allocate_with_source_5.f90: Correct errorneous + semantic. + * gfortran.dg/allocate_with_source_6.f90: New test. + +2015-05-26 Eric Botcazou + + * gnat.dg/atomic7_1.adb: New test. + * gnat.dg/atomic7_2.adb: Likewise. + * gnat.dg/atomic7_pkg1.ads: New helper. + * gnat.dg/atomic7_pkg2.ad[sb]: Likewise. + +2015-05-26 Michael Matz + + PR middle-end/66251 + * gcc.dg/vect/pr66251.c: New test. + +2015-05-26 Richard Biener + + PR tree-optimization/66142 + * gcc.dg/tree-ssa/ssa-fre-44.c: New testcase. + +2015-05-26 Paul Thomas + + PR fortran/66082 + * gfortran.dg/allocatable_scalar_13.f90: New test + +2015-05-25 Eric Botcazou + + * gnat.dg/warn11.adb: New test. + * gnat.dg/specs/alignment2.ads: Add dg-warning directive. + +2015-05-25 Eric Botcazou + + * gnat.dg/vfa1_1.adb: New test. + * gnat.dg/vfa1_2.adb: Likewise. + * gnat.dg/vfa1_3.adb: Likewise. + * gnat.dg/vfa1_4.adb: Likewise. + * gnat.dg/vfa1_pkg.ads: New helper. + +2015-05-25 Alexander Monakov + + * gcc.target/i386/pr66232-1.c: Adjust scan pattern. + * gcc.target/i386/pr66232-3.c: Likewise. + +2015-05-25 Uros Bizjak + + PR target/66274 + * gcc.target/i386/pr66274.c: New test. + +2015-05-25 Eric Botcazou + + * gnat.dg/renaming6.ad[sb]: New test. + +2015-05-25 Andreas Tobler + + * gcc.target/i386/pr64317.c: Use 'dg-require-effective-target ia32' + and 'dg-require-effective-target pie'. + +2015-05-23 Nathan Sidwell + + PR c++/66243 + * g++.dg/cpp0x/pr66243.C: New. + +2015-05-24 Jan Hubicka + + PR lto/66180 + * g++.dg/lto/pr66180_0.C: New testcase. + * g++.dg/lto/pr66180_1.C: New testcase. + +2015-05-24 Mikael Morin + + PR fortran/66257 + * typebound_call_27.f90: New file. + +2015-05-23 Nathan Sidwell + + PR c++/65936 + * g++.dg/template/pr65936.C: New. + +2015-05-22 Marc Glisse + + PR tree-optimization/63387 + * gcc.dg/pr63387-2.c: New testcase. + +2015-05-22 Marc Glisse + + * gcc.dg/simd-1.c: Update to the new message. + +2015-05-22 Marc Glisse + + * gcc.dg/nand.c: New testcase. + +2015-05-22 Sandra Loosemore + + * gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp: + Set dg-do-what-default to compile only on ARM targets without + arm_neon_hw execution support. Remove redundant c-torture-execute + in loop over test cases. + +2015-05-22 Kyrylo Tkachov + + PR target/65491 + * gcc.target/aarch64/pr65491_1.c: New test. + * gcc.target/aarch64/aapcs64/type-def.h (vlf1_t): New typedef. + * gcc.target/aarch64/aapcs64/func-ret-1.c: Add test for vlf1_t. + +2015-05-22 Paolo Carlini + + PR c++/65598 + * g++.dg/cpp0x/explicit9.C: New. + * g++.dg/cpp0x/explicit8.C: Check the locations too. + +2015-05-22 Richard Biener + + PR tree-optimization/66251 + * gfortran.fortran-torture/compile/pr66251.f90: New testcase. + +2015-05-22 Marek Polacek + + PR c/47043 + * c-c++-common/attributes-enum-1.c: New test. + * c-c++-common/attributes-enum-2.c: New test. + * g++.dg/cpp0x/attributes-enum-1.C: New test. + * g++.dg/cpp1y/attributes-enum-1.C: New test. + +2015-05-21 Sandra Loosemore + + * gcc.target/arm/simd/simd.exp: Skip all tests if no arm_neon_ok + effective target support. If no arm_neon_hw support, do not attempt + to execute the tests; only compile them. + * gcc.target/arm/simd/vextf32_1.c: Remove explicit "dg-do run" + and "dg-require-effective-target arm_neon_ok". + * gcc.target/arm/simd/vextp16_1.c: Likewise. + * gcc.target/arm/simd/vextp64_1.c: Likewise. + * gcc.target/arm/simd/vextp8_1.c: Likewise. + * gcc.target/arm/simd/vextQf32_1.c: Likewise. + * gcc.target/arm/simd/vextQp16_1.c: Likewise. + * gcc.target/arm/simd/vextQp64_1.c: Likewise. + * gcc.target/arm/simd/vextQp8_1.c: Likewise. + * gcc.target/arm/simd/vextQs16_1.c: Likewise. + * gcc.target/arm/simd/vextQs32_1.c: Likewise. + * gcc.target/arm/simd/vextQs64_1.c: Likewise. + * gcc.target/arm/simd/vextQs8_1.c: Likewise. + * gcc.target/arm/simd/vextQu16_1.c: Likewise. + * gcc.target/arm/simd/vextQu32_1.c: Likewise. + * gcc.target/arm/simd/vextQu64_1.c: Likewise. + * gcc.target/arm/simd/vextQu8_1.c: Likewise. + * gcc.target/arm/simd/vexts16_1.c: Likewise. + * gcc.target/arm/simd/vexts32_1.c: Likewise. + * gcc.target/arm/simd/vexts64_1.c: Likewise. + * gcc.target/arm/simd/vexts8_1.c: Likewise. + * gcc.target/arm/simd/vextu16_1.c: Likewise. + * gcc.target/arm/simd/vextu32_1.c: Likewise. + * gcc.target/arm/simd/vextu64_1.c: Likewise. + * gcc.target/arm/simd/vextu8_1.c: Likewise. + * gcc.target/arm/simd/vrev16p8_1.c: Likewise. + * gcc.target/arm/simd/vrev16qp8_1.c: Likewise. + * gcc.target/arm/simd/vrev16qs8_1.c: Likewise. + * gcc.target/arm/simd/vrev16qu8_1.c: Likewise. + * gcc.target/arm/simd/vrev16s8_1.c: Likewise. + * gcc.target/arm/simd/vrev16u8_1.c: Likewise. + * gcc.target/arm/simd/vrev32p16_1.c: Likewise. + * gcc.target/arm/simd/vrev32p8_1.c: Likewise. + * gcc.target/arm/simd/vrev32qp16_1.c: Likewise. + * gcc.target/arm/simd/vrev32qp8_1.c: Likewise. + * gcc.target/arm/simd/vrev32qs16_1.c: Likewise. + * gcc.target/arm/simd/vrev32qs8_1.c: Likewise. + * gcc.target/arm/simd/vrev32qu16_1.c: Likewise. + * gcc.target/arm/simd/vrev32qu8_1.c: Likewise. + * gcc.target/arm/simd/vrev32s16_1.c: Likewise. + * gcc.target/arm/simd/vrev32s8_1.c: Likewise. + * gcc.target/arm/simd/vrev32u16_1.c: Likewise. + * gcc.target/arm/simd/vrev32u8_1.c: Likewise. + * gcc.target/arm/simd/vrev64f32_1.c: Likewise. + * gcc.target/arm/simd/vrev64p16_1.c: Likewise. + * gcc.target/arm/simd/vrev64p8_1.c: Likewise. + * gcc.target/arm/simd/vrev64qf32_1.c: Likewise. + * gcc.target/arm/simd/vrev64qp16_1.c: Likewise. + * gcc.target/arm/simd/vrev64qp8_1.c: Likewise. + * gcc.target/arm/simd/vrev64qs16_1.c: Likewise. + * gcc.target/arm/simd/vrev64qs32_1.c: Likewise. + * gcc.target/arm/simd/vrev64qs8_1.c: Likewise. + * gcc.target/arm/simd/vrev64qu16_1.c: Likewise. + * gcc.target/arm/simd/vrev64qu32_1.c: Likewise. + * gcc.target/arm/simd/vrev64qu8_1.c: Likewise. + * gcc.target/arm/simd/vrev64s16_1.c: Likewise. + * gcc.target/arm/simd/vrev64s32_1.c: Likewise. + * gcc.target/arm/simd/vrev64s8_1.c: Likewise. + * gcc.target/arm/simd/vrev64u16_1.c: Likewise. + * gcc.target/arm/simd/vrev64u32_1.c: Likewise. + * gcc.target/arm/simd/vrev64u8_1.c: Likewise. + * gcc.target/arm/simd/vtrnf32_1.c: Likewise. + * gcc.target/arm/simd/vtrnp16_1.c: Likewise. + * gcc.target/arm/simd/vtrnp8_1.c: Likewise. + * gcc.target/arm/simd/vtrnqf32_1.c: Likewise. + * gcc.target/arm/simd/vtrnqp16_1.c: Likewise. + * gcc.target/arm/simd/vtrnqp8_1.c: Likewise. + * gcc.target/arm/simd/vtrnqs16_1.c: Likewise. + * gcc.target/arm/simd/vtrnqs32_1.c: Likewise. + * gcc.target/arm/simd/vtrnqs8_1.c: Likewise. + * gcc.target/arm/simd/vtrnqu16_1.c: Likewise. + * gcc.target/arm/simd/vtrnqu32_1.c: Likewise. + * gcc.target/arm/simd/vtrnqu8_1.c: Likewise. + * gcc.target/arm/simd/vtrns16_1.c: Likewise. + * gcc.target/arm/simd/vtrns32_1.c: Likewise. + * gcc.target/arm/simd/vtrns8_1.c: Likewise. + * gcc.target/arm/simd/vtrnu16_1.c: Likewise. + * gcc.target/arm/simd/vtrnu32_1.c: Likewise. + * gcc.target/arm/simd/vtrnu8_1.c: Likewise. + * gcc.target/arm/simd/vuzpf32_1.c: Likewise. + * gcc.target/arm/simd/vuzpp16_1.c: Likewise. + * gcc.target/arm/simd/vuzpp8_1.c: Likewise. + * gcc.target/arm/simd/vuzpqf32_1.c: Likewise. + * gcc.target/arm/simd/vuzpqp16_1.c: Likewise. + * gcc.target/arm/simd/vuzpqp8_1.c: Likewise. + * gcc.target/arm/simd/vuzpqs16_1.c: Likewise. + * gcc.target/arm/simd/vuzpqs32_1.c: Likewise. + * gcc.target/arm/simd/vuzpqs8_1.c: Likewise. + * gcc.target/arm/simd/vuzpqu16_1.c: Likewise. + * gcc.target/arm/simd/vuzpqu32_1.c: Likewise. + * gcc.target/arm/simd/vuzpqu8_1.c: Likewise. + * gcc.target/arm/simd/vuzps16_1.c: Likewise. + * gcc.target/arm/simd/vuzps32_1.c: Likewise. + * gcc.target/arm/simd/vuzps8_1.c: Likewise. + * gcc.target/arm/simd/vuzpu16_1.c: Likewise. + * gcc.target/arm/simd/vuzpu32_1.c: Likewise. + * gcc.target/arm/simd/vuzpu8_1.c: Likewise. + * gcc.target/arm/simd/vzipf32_1.c: Likewise. + * gcc.target/arm/simd/vzipp16_1.c: Likewise. + * gcc.target/arm/simd/vzipp8_1.c: Likewise. + * gcc.target/arm/simd/vzipqf32_1.c: Likewise. + * gcc.target/arm/simd/vzipqp16_1.c: Likewise. + * gcc.target/arm/simd/vzipqp8_1.c: Likewise. + * gcc.target/arm/simd/vzipqs16_1.c: Likewise. + * gcc.target/arm/simd/vzipqs32_1.c: Likewise. + * gcc.target/arm/simd/vzipqs8_1.c: Likewise. + * gcc.target/arm/simd/vzipqu16_1.c: Likewise. + * gcc.target/arm/simd/vzipqu32_1.c: Likewise. + * gcc.target/arm/simd/vzipqu8_1.c: Likewise. + * gcc.target/arm/simd/vzips16_1.c: Likewise. + * gcc.target/arm/simd/vzips32_1.c: Likewise. + * gcc.target/arm/simd/vzips8_1.c: Likewise. + * gcc.target/arm/simd/vzipu16_1.c: Likewise. + * gcc.target/arm/simd/vzipu32_1.c: Likewise. + * gcc.target/arm/simd/vzipu8_1.c: Likewise. + +2015-05-21 Sandra Loosemore + + * gcc.dg/vect/bb-slp-pr65935.c: Remove explicit "dg-do run". + * gcc.dg/vect/pr59354.c: Likewise. + * gcc.dg/vect/pr64252.c: Likewise. + * gcc.dg/vect/pr64404.c: Likewise. + * gcc.dg/vect/pr64493.c: Likewise. + * gcc.dg/vect/pr64495.c: Likewise. + * gcc.dg/vect/pr64844.c: Likewise. + * gcc.dg/vect/pr65518.c: Likewise. + * gcc.dg/vect/vect-aggressive-1.c: Likewise. + +2015-05-21 Paolo Carlini + + PR c++/66210 + * g++.dg/cpp1y/var-templ28.C: New. + +2015-05-21 H.J. Lu + + PR target/66232 + * gcc.target/i386/pr66232-1.c: New test. + * gcc.target/i386/pr66232-2.c: Likewise. + * gcc.target/i386/pr66232-3.c: Likewise. + * gcc.target/i386/pr66232-4.c: Likewise. + * gcc.target/i386/pr66232-5.c: Likewise. + +2015-05-21 Nathan Sidwell + + * g++.dg/cpp1y/pr60943.C: New. + 2015-05-21 Jakub Jelinek PR tree-optimization/66233 @@ -25,9 +376,10 @@ 2015-05-21 Jeff Law + * gcc.target/hppa/shadd-3.c: New test. * gcc.target/hppa/shadd-4.c: New test. -2015-05-08 Michael Matz +2015-05-21 Michael Matz * gcc.dg/vect/vect-strided-store.c: New test. * gfortran.dg/vect/fast-math-pr37021.f90: Adjust.