X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gdb%2Fmips-tdep.c;h=0ccb86104353431b818679483d436cbcc6846a47;hb=4b9b395931f9b9ed5bff797fad1e128fe9da136b;hp=0e11f7e7c6c4c76b6204596eaa21e66f27dbe1f7;hpb=d929b26ff10049094a5f5efe875af853f845b494;p=binutils-gdb.git diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 0e11f7e7c6c..0ccb8610435 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -1,5 +1,8 @@ /* Target-dependent code for the MIPS architecture, for GDB, the GNU Debugger. - Copyright 1988-1999, Free Software Foundation, Inc. + + Copyright 1988, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, + 1997, 1998, 1999, 2000, Free Software Foundation, Inc. + Contributed by Alessandro Forin(af@cs.cmu.edu) at CMU and by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin. @@ -40,6 +43,26 @@ #include "elf-bfd.h" +/* The sizes of floating point registers. */ + +enum +{ + MIPS_FPU_SINGLE_REGSIZE = 4, + MIPS_FPU_DOUBLE_REGSIZE = 8 +}; + +/* All the possible MIPS ABIs. */ + +enum mips_abi + { + MIPS_ABI_UNKNOWN, + MIPS_ABI_N32, + MIPS_ABI_O32, + MIPS_ABI_O64, + MIPS_ABI_EABI32, + MIPS_ABI_EABI64 + }; + struct frame_extra_info { mips_extra_func_info_t proc_desc; @@ -50,11 +73,11 @@ struct frame_extra_info overridden dynamically. Establish an enum/array for managing them. */ -static char size_auto[] = "auto"; -static char size_32[] = "32"; -static char size_64[] = "64"; +static const char size_auto[] = "auto"; +static const char size_32[] = "32"; +static const char size_64[] = "64"; -static char *size_enums[] = { +static const char *size_enums[] = { size_auto, size_32, size_64, @@ -91,7 +114,7 @@ struct gdbarch_tdep /* from the elf header */ int elf_flags; /* mips options */ - int mips_eabi; + enum mips_abi mips_abi; enum mips_fpu_type mips_fpu_type; int mips_last_arg_regnum; int mips_last_fp_arg_regnum; @@ -103,7 +126,8 @@ struct gdbarch_tdep #if GDB_MULTI_ARCH #undef MIPS_EABI -#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_eabi) +#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \ + || gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI64) #endif #if GDB_MULTI_ARCH @@ -130,7 +154,7 @@ struct gdbarch_tdep #define MIPS_DEFAULT_SAVED_REGSIZE MIPS_REGSIZE #endif -static char *mips_saved_regsize_string = size_auto; +static const char *mips_saved_regsize_string = size_auto; #define MIPS_SAVED_REGSIZE (mips_saved_regsize()) @@ -171,14 +195,14 @@ mips_saved_regsize () #if GDB_MULTI_ARCH #undef MIPS_DEFAULT_STACK_ARGSIZE -#define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_statck_argsize) +#define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_stack_argsize) #elif !defined (MIPS_DEFAULT_STACK_ARGSIZE) #define MIPS_DEFAULT_STACK_ARGSIZE (MIPS_DEFAULT_SAVED_REGSIZE) #endif #define MIPS_STACK_ARGSIZE (mips_stack_argsize ()) -static char *mips_stack_argsize_string = size_auto; +static const char *mips_stack_argsize_string = size_auto; static unsigned int mips_stack_argsize (void) @@ -196,32 +220,31 @@ mips_stack_argsize (void) #define VM_MIN_ADDRESS (CORE_ADDR)0x400000 #if 0 -static int mips_in_lenient_prologue PARAMS ((CORE_ADDR, CORE_ADDR)); +static int mips_in_lenient_prologue (CORE_ADDR, CORE_ADDR); #endif -int gdb_print_insn_mips PARAMS ((bfd_vma, disassemble_info *)); +int gdb_print_insn_mips (bfd_vma, disassemble_info *); -static void mips_print_register PARAMS ((int, int)); +static void mips_print_register (int, int); static mips_extra_func_info_t - heuristic_proc_desc PARAMS ((CORE_ADDR, CORE_ADDR, struct frame_info *)); +heuristic_proc_desc (CORE_ADDR, CORE_ADDR, struct frame_info *); -static CORE_ADDR heuristic_proc_start PARAMS ((CORE_ADDR)); +static CORE_ADDR heuristic_proc_start (CORE_ADDR); -static CORE_ADDR read_next_frame_reg PARAMS ((struct frame_info *, int)); +static CORE_ADDR read_next_frame_reg (struct frame_info *, int); -int mips_set_processor_type PARAMS ((char *)); +int mips_set_processor_type (char *); -static void mips_show_processor_type_command PARAMS ((char *, int)); +static void mips_show_processor_type_command (char *, int); -static void reinit_frame_cache_sfunc PARAMS ((char *, int, - struct cmd_list_element *)); +static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *); static mips_extra_func_info_t - find_proc_desc PARAMS ((CORE_ADDR pc, struct frame_info * next_frame)); +find_proc_desc (CORE_ADDR pc, struct frame_info *next_frame); -static CORE_ADDR after_prologue PARAMS ((CORE_ADDR pc, - mips_extra_func_info_t proc_desc)); +static CORE_ADDR after_prologue (CORE_ADDR pc, + mips_extra_func_info_t proc_desc); /* This value is the model of MIPS in use. It is derived from the value of the PrID register. */ @@ -2681,7 +2704,7 @@ mips_frame_num_args (frame) /* Is this a branch with a delay slot? */ -static int is_delayed PARAMS ((unsigned long)); +static int is_delayed (unsigned long); static int is_delayed (insn) @@ -2980,7 +3003,8 @@ struct return_value_word int buf_offset; }; -static void return_value_location PARAMS ((struct type *, struct return_value_word *, struct return_value_word *)); +static void return_value_location (struct type *, struct return_value_word *, + struct return_value_word *); static void return_value_location (valtype, hi, lo) @@ -3206,7 +3230,7 @@ in_sigtramp (pc, ignore) /* Root of all "set mips "/"show mips " commands. This will eventually be used for all MIPS-specific commands. */ -static void show_mips_command PARAMS ((char *, int)); +static void show_mips_command (char *, int); static void show_mips_command (args, from_tty) char *args; @@ -3215,7 +3239,7 @@ show_mips_command (args, from_tty) help_list (showmipscmdlist, "show mips ", all_commands, gdb_stdout); } -static void set_mips_command PARAMS ((char *, int)); +static void set_mips_command (char *, int); static void set_mips_command (args, from_tty) char *args; @@ -3227,7 +3251,7 @@ set_mips_command (args, from_tty) /* Commands to show/set the MIPS FPU type. */ -static void show_mipsfpu_command PARAMS ((char *, int)); +static void show_mipsfpu_command (char *, int); static void show_mipsfpu_command (args, from_tty) char *args; @@ -3256,7 +3280,7 @@ show_mipsfpu_command (args, from_tty) } -static void set_mipsfpu_command PARAMS ((char *, int)); +static void set_mipsfpu_command (char *, int); static void set_mipsfpu_command (args, from_tty) char *args; @@ -3266,7 +3290,7 @@ set_mipsfpu_command (args, from_tty) show_mipsfpu_command (args, from_tty); } -static void set_mipsfpu_single_command PARAMS ((char *, int)); +static void set_mipsfpu_single_command (char *, int); static void set_mipsfpu_single_command (args, from_tty) char *args; @@ -3280,7 +3304,7 @@ set_mipsfpu_single_command (args, from_tty) } } -static void set_mipsfpu_double_command PARAMS ((char *, int)); +static void set_mipsfpu_double_command (char *, int); static void set_mipsfpu_double_command (args, from_tty) char *args; @@ -3294,7 +3318,7 @@ set_mipsfpu_double_command (args, from_tty) } } -static void set_mipsfpu_none_command PARAMS ((char *, int)); +static void set_mipsfpu_none_command (char *, int); static void set_mipsfpu_none_command (args, from_tty) char *args; @@ -3308,7 +3332,7 @@ set_mipsfpu_none_command (args, from_tty) } } -static void set_mipsfpu_auto_command PARAMS ((char *, int)); +static void set_mipsfpu_auto_command (char *, int); static void set_mipsfpu_auto_command (args, from_tty) char *args; @@ -3738,6 +3762,72 @@ mips_coerce_float_to_double (struct type *formal, struct type *actual) return current_language->la_language == language_c; } +/* When debugging a 64 MIPS target running a 32 bit ABI, the size of + the register stored on the stack (32) is different to its real raw + size (64). The below ensures that registers are fetched from the + stack using their ABI size and then stored into the RAW_BUFFER + using their raw size. + + The alternative to adding this function would be to add an ABI + macro - REGISTER_STACK_SIZE(). */ + +static void +mips_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) + char *raw_buffer; + int *optimized; + CORE_ADDR *addrp; + struct frame_info *frame; + int regnum; + enum lval_type *lval; +{ + CORE_ADDR addr; + + if (!target_has_registers) + error ("No registers."); + + /* Normal systems don't optimize out things with register numbers. */ + if (optimized != NULL) + *optimized = 0; + addr = find_saved_register (frame, regnum); + if (addr != 0) + { + if (lval != NULL) + *lval = lval_memory; + if (regnum == SP_REGNUM) + { + if (raw_buffer != NULL) + { + /* Put it back in target format. */ + store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), + (LONGEST) addr); + } + if (addrp != NULL) + *addrp = 0; + return; + } + if (raw_buffer != NULL) + { + LONGEST val; + if (regnum < 32) + /* Only MIPS_SAVED_REGSIZE bytes of GP registers are + saved. */ + val = read_memory_integer (addr, MIPS_SAVED_REGSIZE); + else + val = read_memory_integer (addr, REGISTER_RAW_SIZE (regnum)); + store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), val); + } + } + else + { + if (lval != NULL) + *lval = lval_register; + addr = REGISTER_BYTE (regnum); + if (raw_buffer != NULL) + read_register_gen (regnum, raw_buffer); + } + if (addrp != NULL) + *addrp = addr; +} static gdbarch_init_ftype mips_gdbarch_init; static struct gdbarch * @@ -3750,9 +3840,9 @@ mips_gdbarch_init (info, arches) struct gdbarch *gdbarch; struct gdbarch_tdep *tdep; int elf_flags; - char *ef_mips_abi; int ef_mips_bitptrs; int ef_mips_arch; + enum mips_abi mips_abi; /* Extract the elf_flags if available */ if (info.abfd != NULL @@ -3761,6 +3851,62 @@ mips_gdbarch_init (info, arches) else elf_flags = 0; + /* Check ELF_FLAGS to see if it specifies the ABI being used. */ + switch ((elf_flags & EF_MIPS_ABI)) + { + case E_MIPS_ABI_O32: + mips_abi = MIPS_ABI_O32; + break; + case E_MIPS_ABI_O64: + mips_abi = MIPS_ABI_O64; + break; + case E_MIPS_ABI_EABI32: + mips_abi = MIPS_ABI_EABI32; + break; + case E_MIPS_ABI_EABI64: + mips_abi = MIPS_ABI_EABI32; + break; + default: + mips_abi = MIPS_ABI_UNKNOWN; + break; + } + /* Try the architecture for any hint of the corect ABI */ + if (mips_abi == MIPS_ABI_UNKNOWN + && info.bfd_arch_info != NULL + && info.bfd_arch_info->arch == bfd_arch_mips) + { + switch (info.bfd_arch_info->mach) + { + case bfd_mach_mips3900: + mips_abi = MIPS_ABI_EABI32; + break; + case bfd_mach_mips4100: + case bfd_mach_mips5000: + mips_abi = MIPS_ABI_EABI64; + break; + } + } +#ifdef MIPS_DEFAULT_ABI + if (mips_abi == MIPS_ABI_UNKNOWN) + mips_abi = MIPS_DEFAULT_ABI; +#endif + + if (gdbarch_debug) + { + fprintf_unfiltered (gdb_stdlog, + "mips_gdbarch_init: elf_flags = %08x\n", + elf_flags); + fprintf_unfiltered (gdb_stdlog, + "mips_gdbarch_init: ef_mips_arch = %d\n", + ef_mips_arch); + fprintf_unfiltered (gdb_stdlog, + "mips_gdbarch_init: ef_mips_bitptrs = %d\n", + ef_mips_bitptrs); + fprintf_unfiltered (gdb_stdlog, + "mips_gdbarch_init: mips_abi = %d\n", + mips_abi); + } + /* try to find a pre-existing architecture */ for (arches = gdbarch_list_lookup_by_info (arches, &info); arches != NULL; @@ -3770,6 +3916,8 @@ mips_gdbarch_init (info, arches) using. */ if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags) continue; + if (gdbarch_tdep (current_gdbarch)->mips_abi != mips_abi) + continue; return arches->gdbarch; } @@ -3784,55 +3932,76 @@ mips_gdbarch_init (info, arches) set_gdbarch_float_bit (gdbarch, 32); set_gdbarch_double_bit (gdbarch, 64); set_gdbarch_long_double_bit (gdbarch, 64); - switch ((elf_flags & EF_MIPS_ABI)) + tdep->mips_abi = mips_abi; + switch (mips_abi) { - case E_MIPS_ABI_O32: - ef_mips_abi = "o32"; - tdep->mips_eabi = 0; + case MIPS_ABI_O32: tdep->mips_default_saved_regsize = 4; + tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; + tdep->mips_last_arg_regnum = ZERO_REGNUM + 7; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15; + tdep->mips_regs_have_home_p = 1; set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_long_long_bit (gdbarch, 64); break; - case E_MIPS_ABI_O64: - ef_mips_abi = "o64"; - tdep->mips_eabi = 0; + case MIPS_ABI_O64: tdep->mips_default_saved_regsize = 8; + tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; + tdep->mips_last_arg_regnum = ZERO_REGNUM + 7; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15; + tdep->mips_regs_have_home_p = 1; set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_long_long_bit (gdbarch, 64); break; - case E_MIPS_ABI_EABI32: - ef_mips_abi = "eabi32"; - tdep->mips_eabi = 1; + case MIPS_ABI_EABI32: tdep->mips_default_saved_regsize = 4; + tdep->mips_default_stack_argsize = 4; tdep->mips_fp_register_double = 0; + tdep->mips_last_arg_regnum = ZERO_REGNUM + 11; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; + tdep->mips_regs_have_home_p = 0; set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_long_long_bit (gdbarch, 64); break; - case E_MIPS_ABI_EABI64: - ef_mips_abi = "eabi64"; - tdep->mips_eabi = 1; + case MIPS_ABI_EABI64: tdep->mips_default_saved_regsize = 8; + tdep->mips_default_stack_argsize = 8; tdep->mips_fp_register_double = 1; + tdep->mips_last_arg_regnum = ZERO_REGNUM + 11; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; + tdep->mips_regs_have_home_p = 0; set_gdbarch_long_bit (gdbarch, 64); set_gdbarch_ptr_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64); break; + case MIPS_ABI_N32: + tdep->mips_default_saved_regsize = 4; + tdep->mips_default_stack_argsize = 8; + tdep->mips_fp_register_double = 1; + tdep->mips_last_arg_regnum = ZERO_REGNUM + 11; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; + tdep->mips_regs_have_home_p = 0; + set_gdbarch_long_bit (gdbarch, 32); + set_gdbarch_ptr_bit (gdbarch, 32); + set_gdbarch_long_long_bit (gdbarch, 64); + break; default: - ef_mips_abi = "default"; - tdep->mips_eabi = 0; tdep->mips_default_saved_regsize = MIPS_REGSIZE; + tdep->mips_default_stack_argsize = MIPS_REGSIZE; tdep->mips_fp_register_double = (REGISTER_VIRTUAL_SIZE (FP0_REGNUM) == 8); + tdep->mips_last_arg_regnum = ZERO_REGNUM + 11; + tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; + tdep->mips_regs_have_home_p = 1; set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_long_long_bit (gdbarch, 64); break; } - tdep->mips_default_stack_argsize = tdep->mips_default_saved_regsize; /* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE that could indicate -gp32 BUT gas/config/tc-mips.c contains the @@ -3890,26 +4059,6 @@ mips_gdbarch_init (info, arches) } #endif - /* Select either of the two alternative ABI's */ - if (tdep->mips_eabi) - { - /* EABI uses R4 through R11 for args */ - tdep->mips_last_arg_regnum = 11; - /* EABI uses F12 through F19 for args */ - tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19; - /* EABI does not reserve home space for registers */ - tdep->mips_regs_have_home_p = 0; - } - else - { - /* old ABI uses R4 through R7 for args */ - tdep->mips_last_arg_regnum = 7; - /* old ABI uses F12 through F15 for args */ - tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15; - /* Old ABI reserves home space for registers */ - tdep->mips_regs_have_home_p = 1; - } - /* enable/disable the MIPS FPU */ if (!mips_fpu_type_auto) tdep->mips_fpu_type = mips_fpu_type; @@ -3917,10 +4066,14 @@ mips_gdbarch_init (info, arches) && info.bfd_arch_info->arch == bfd_arch_mips) switch (info.bfd_arch_info->mach) { + case bfd_mach_mips3900: case bfd_mach_mips4100: case bfd_mach_mips4111: tdep->mips_fpu_type = MIPS_FPU_NONE; break; + case bfd_mach_mips4650: + tdep->mips_fpu_type = MIPS_FPU_SINGLE; + break; default: tdep->mips_fpu_type = MIPS_FPU_DOUBLE; break; @@ -3963,51 +4116,72 @@ mips_gdbarch_init (info, arches) set_gdbarch_coerce_float_to_double (gdbarch, mips_coerce_float_to_double); set_gdbarch_frame_chain_valid (gdbarch, func_frame_chain_valid); - set_gdbarch_get_saved_register (gdbarch, default_get_saved_register); - - if (gdbarch_debug) - { - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: (info)elf_flags = 0x%x\n", - elf_flags); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: (info)ef_mips_abi = %s\n", - ef_mips_abi); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: (info)ef_mips_arch = %d\n", - ef_mips_arch); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: (info)ef_mips_bitptrs = %d\n", - ef_mips_bitptrs); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: MIPS_EABI = %d\n", - tdep->mips_eabi); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: MIPS_LAST_ARG_REGNUM = %d\n", - tdep->mips_last_arg_regnum); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: MIPS_LAST_FP_ARG_REGNUM = %d (%d)\n", - tdep->mips_last_fp_arg_regnum, - tdep->mips_last_fp_arg_regnum - FP0_REGNUM); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: tdep->mips_fpu_type = %d (%s)\n", - tdep->mips_fpu_type, - (tdep->mips_fpu_type == MIPS_FPU_NONE ? "none" - : tdep->mips_fpu_type == MIPS_FPU_SINGLE ? "single" - : tdep->mips_fpu_type == MIPS_FPU_DOUBLE ? "double" - : "???")); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: tdep->mips_default_saved_regsize = %d\n", - tdep->mips_default_saved_regsize); - fprintf_unfiltered (gdb_stderr, - "mips_gdbarch_init: tdep->mips_fp_register_double = %d (%s)\n", - tdep->mips_fp_register_double, - (tdep->mips_fp_register_double ? "true" : "false")); - } + set_gdbarch_get_saved_register (gdbarch, mips_get_saved_register); return gdbarch; } +static void +mips_dump_tdep (struct gdbarch *current_gdbarch, struct ui_file *file) +{ + struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + if (tdep != NULL) + { + fprintf_unfiltered (file, + "mips_dump_tdep: tdep->elf_flags = 0x%x\n", + tdep->elf_flags); + fprintf_unfiltered (file, + "mips_dump_tdep: tdep->mips_abi = %d\n", + tdep->mips_abi); + } + fprintf_unfiltered (file, + "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n", + FP_REGISTER_DOUBLE); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_DEFAULT_FPU_TYPE = %d (%s)\n", + MIPS_DEFAULT_FPU_TYPE, + (MIPS_DEFAULT_FPU_TYPE == MIPS_FPU_NONE ? "none" + : MIPS_DEFAULT_FPU_TYPE == MIPS_FPU_SINGLE ? "single" + : MIPS_DEFAULT_FPU_TYPE == MIPS_FPU_DOUBLE ? "double" + : "???")); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_EABI = %d\n", + MIPS_EABI); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_LAST_FP_ARG_REGNUM = %d\n", + MIPS_LAST_FP_ARG_REGNUM); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_LAST_ARG_REGNUM = %d\n", + MIPS_LAST_ARG_REGNUM); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_FPU_TYPE = %d (%s)\n", + MIPS_FPU_TYPE, + (MIPS_FPU_TYPE == MIPS_FPU_NONE ? "none" + : MIPS_FPU_TYPE == MIPS_FPU_SINGLE ? "single" + : MIPS_FPU_TYPE == MIPS_FPU_DOUBLE ? "double" + : "???")); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_DEFAULT_SAVED_REGSIZE = %d\n", + MIPS_DEFAULT_SAVED_REGSIZE); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_SAVED_REGSIZE = %d\n", + MIPS_SAVED_REGSIZE); + fprintf_unfiltered (file, + "mips_dump_tdep: FP_REGISTER_DOUBLE = %d\n", + FP_REGISTER_DOUBLE); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_REGS_HAVE_HOME_P = %d\n", + MIPS_REGS_HAVE_HOME_P); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_DEFAULT_STACK_ARGSIZE = %d\n", + MIPS_DEFAULT_STACK_ARGSIZE); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_STACK_ARGSIZE = %d\n", + MIPS_STACK_ARGSIZE); + fprintf_unfiltered (file, + "mips_dump_tdep: MIPS_REGSIZE = %d\n", + MIPS_REGSIZE); +} void _initialize_mips_tdep () @@ -4015,8 +4189,7 @@ _initialize_mips_tdep () static struct cmd_list_element *mipsfpulist = NULL; struct cmd_list_element *c; - if (GDB_MULTI_ARCH) - register_gdbarch_init (bfd_arch_mips, mips_gdbarch_init); + gdbarch_register (bfd_arch_mips, mips_gdbarch_init, mips_dump_tdep); if (!tm_print_insn) /* Someone may have already set it */ tm_print_insn = gdb_print_insn_mips; @@ -4031,9 +4204,9 @@ _initialize_mips_tdep () /* Allow the user to override the saved register size. */ add_show_from_set (add_set_enum_cmd ("saved-gpreg-size", - class_obscure, - size_enums, - (char *) &mips_saved_regsize_string, "\ + class_obscure, + size_enums, + &mips_saved_regsize_string, "\ Set size of general purpose registers saved on the stack.\n\ This option can be set to one of:\n\ 32 - Force GDB to treat saved GP registers as 32-bit\n\ @@ -4041,14 +4214,14 @@ This option can be set to one of:\n\ auto - Allow GDB to use the target's default setting or autodetect the\n\ saved GP register size from information contained in the executable.\n\ (default: auto)", - &setmipscmdlist), + &setmipscmdlist), &showmipscmdlist); /* Allow the user to override the argument stack size. */ add_show_from_set (add_set_enum_cmd ("stack-arg-size", class_obscure, size_enums, - (char *) &mips_stack_argsize_string, "\ + &mips_stack_argsize_string, "\ Set the amount of stack space reserved for each argument.\n\ This option can be set to one of:\n\ 32 - Force GDB to allocate 32-bit chunks per argument\n\