X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=gdb%2Fmips-tdep.h;h=1e84e93c5d7d0ff9252ed909fcecf459ad858bb0;hb=1946c4ccca04e374acc040fc30c8b44d2c9ca0a8;hp=2e85895e5c1f5654a744637e2f1592838e131c32;hpb=4cc0665f24bbd86deb1848cd67f90994a1b527b2;p=binutils-gdb.git

diff --git a/gdb/mips-tdep.h b/gdb/mips-tdep.h
index 2e85895e5c1..1e84e93c5d7 100644
--- a/gdb/mips-tdep.h
+++ b/gdb/mips-tdep.h
@@ -1,6 +1,6 @@
 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
 
-   Copyright (C) 2002-2003, 2007-2012 Free Software Foundation, Inc.
+   Copyright (C) 2002-2015 Free Software Foundation, Inc.
 
    This file is part of GDB.
 
@@ -20,6 +20,8 @@
 #ifndef MIPS_TDEP_H
 #define MIPS_TDEP_H
 
+#include "objfiles.h"
+
 struct gdbarch;
 
 /* All the possible MIPS ABIs.  */
@@ -46,6 +48,10 @@ enum mips_isa
     ISA_MICROMIPS
   };
 
+/* Corresponding MSYMBOL_TARGET_FLAG aliases.  */
+#define MSYMBOL_TARGET_FLAG_MIPS16 MSYMBOL_TARGET_FLAG_1
+#define MSYMBOL_TARGET_FLAG_MICROMIPS MSYMBOL_TARGET_FLAG_2
+
 /* Return the MIPS ISA's register size.  Just a short cut to the BFD
    architecture's word size.  */
 extern int mips_isa_regsize (struct gdbarch *gdbarch);
@@ -107,14 +113,6 @@ struct gdbarch_tdep
   int register_size_valid_p;
   int register_size;
 
-  /* General-purpose registers.  */
-  struct regset *gregset;
-  struct regset *gregset64;
-
-  /* Floating-point registers.  */
-  struct regset *fpregset;
-  struct regset *fpregset64;
-
   /* Return the expected next PC if FRAME is stopped at a syscall
      instruction.  */
   CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
@@ -161,6 +159,9 @@ enum
 /* Single step based on where the current instruction will take us.  */
 extern int mips_software_single_step (struct frame_info *frame);
 
+/* Strip the ISA (compression) bit off from ADDR.  */
+extern CORE_ADDR mips_unmake_compact_addr (CORE_ADDR addr);
+
 /* Tell if the program counter value in MEMADDR is in a standard
    MIPS function.  */
 extern int mips_pc_is_mips (bfd_vma memaddr);
@@ -184,4 +185,12 @@ extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
 extern struct target_desc *mips_tdesc_gp32;
 extern struct target_desc *mips_tdesc_gp64;
 
+/* Return non-zero if PC is in a MIPS SVR4 lazy binding stub section.  */
+
+static inline int
+in_mips_stubs_section (CORE_ADDR pc)
+{
+  return pc_in_section (pc, ".MIPS.stubs");
+}
+
 #endif /* MIPS_TDEP_H */