X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=index.mdwn;h=2789f3755abe7d099701472294e28c6c38edd84b;hb=887c3e076845c397abec1aa316a79b96966ff66b;hp=7d3de7f588e4f8857089dc6f7deb107772c159ff;hpb=ca8afe2974d6166f82b46f28c93e0451c2a099f4;p=libreriscv.git diff --git a/index.mdwn b/index.mdwn index 7d3de7f58..2789f3755 100644 --- a/index.mdwn +++ b/index.mdwn @@ -5,7 +5,7 @@

A chip with lots of peripherals. And a VPU. And a 3D GPU...

-

Oh and here, have the source code...

+

Oh and here, have the source code...


@@ -56,10 +56,14 @@ We are proud of our talented and diverse [team](about_us). charitable gifting * [Raptor CS](http://raptorcs.com) has given us access to a powerful 18-core 128 GB RAM TALOS II workstation, online. +* [Raptor Engineering](https://raptorengineering.com) is providing + additional assistance including access to an [[shakti/m_class/LPC]] + interface (more to come) * [MarketNext](http://marketnext.org) is helping us connect to developer resources in Emerging markets, for completion of NLNet-funded tasks. See the upcoming [Hackathon](https://www.youtube.com/embed/Px6eakWja3Q"), deadline May 15th +* The [[PowerPC Notebook]] Project # How Can I Help? @@ -77,26 +81,28 @@ below. If there is anything else, just get in touch on the list, there is plenty to do. 1. First, join the -[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev), -introduce yourself (people will happily say "hello" back"). Read through -[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/) -and the [[charter]], and let everyone know, on the list that you're -happy with it and agree to it. -2. The next thing you should do is read through the [bugs -list](http://bugs.libre-riscv.org) and see if there are any bugs that -pique your interest. -3. After that, go ahead and take a look at the [git repositories](https://git.libre-riscv.org). - + [mailing list](http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev), + introduce yourself (people will happily say "hello" back"). Read through + [recent posts](http://lists.libre-soc.org/pipermail/libre-soc-dev/) + and the [[charter]], and let everyone know, on the list that you're + happy with it and agree to it. +2. The next thing you should do is read through the + [bugs list](http://bugs.libre-soc.org) and + see if there are any bugs that pique your interest. + A fascinating way to do that is to view the + [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR) +3. After that, go ahead and take a look at the + [git repositories](https://git.libre-soc.org). 4. If you plan to do HDL work, you should familiarize yourself with our - [[HDL_workflow]]. If you would like to help with the ASIC layout, - see [[HDL_workflow/coriolis2]] + [[HDL_workflow]]. If you would like to help with the ASIC layout, + see [[HDL_workflow/coriolis2]] 5. We do have funding available (see [[nlnet]]) upon completion of issues - -we are also working on procuring more funding which gets the project to -nanometre scale tapeout. + we are also working on procuring more funding which gets the project to + nanometre scale tapeout. 6. After all this, if you feel that Libre-SOC is a something - that you would like to contribute to, add yourself to the - [current_members](about_us) page, fill in some information about yourself, - and join the mailing list and say hello. + that you would like to contribute to, add yourself to the + [current_members](about_us) page, fill in some information about yourself, + and join the mailing list and say hello. Also note that you can edit this wiki. You can experiment in the [[Sandbox]]. @@ -107,22 +113,20 @@ Here is an example process of how to play with the soc code: pip3 install virtualenv requests mkdir ~/.virtualenvs && cd ~/.virtualenvs python3 -m venv libresoc - source ~/.virtualenvs/bin/activate + source ~/.virtualenvs/libresoc/bin/activate cd ~; mkdir libresoc; cd libresoc - git clone https://git.libre-riscv.org/git/nmutil.git - git clone https://git.libre-riscv.org/git/ieee754fpu.git - git clone https://git.libre-riscv.org/git/soc.git + git clone https://git.libre-soc.org/git/nmutil.git + git clone https://git.libre-soc.org/git/ieee754fpu.git + git clone https://git.libre-soc.org/git/soc.git - cd nmutil; pip3 install -e .; cd .. - cd ieee754fpu; pip3 install -e .; cd .. - cd soc; pip3 install -e .; cd .. + cd nmutil; make install; cd .. + cd ieee754fpu; make install; cd .. + cd soc; make gitupdate; make install; cd .. python3 soc/src/soc/decoder/power_decoder.py yosys -p "read_ilang decoder.il; show dec31" - - ## How can I learn? The whole purpose of this project is to be a learning environment as well @@ -156,4 +160,7 @@ accelerated opcodes (all of which SwiftShader lacks) Also, individuals with experience in formal mathematical verification are quite welcome. -# [Documentation](Documentation/SOC/index) +# Documentation + + - [Source Code](/Documentation/index) + - [Architecture](3d_gpu/architecture)