X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=index.mdwn;h=3a351825c1c382fb1ff3e59050331186246bc111;hb=130dd5ab79c7b6517fca12708b6e4dc8b418ca2b;hp=671538ab4b512a123f4e872e47f7ee4bbd20ad2c;hpb=2872fc6a0c4a0a836a9f038a82347912a325de7f;p=libreriscv.git diff --git a/index.mdwn b/index.mdwn index 671538ab4..3a351825c 100644 --- a/index.mdwn +++ b/index.mdwn @@ -1,11 +1,15 @@

Welcome to Libre-SOC

-

We're building a chip. A fast chip. A safe chip. A trusted chip.

+

We're building a chip. A fast chip. A safe chip. A trusted chip. +

-

A chip with lots of peripherals. And a VPU. And a 3D GPU...

+

A chip with lots of peripherals. And it's a VPU. And it's a 3D GPU... +

-

Oh and here, have the source code...

+

Oh and here, have the + Libre-SOC source code... +

@@ -52,6 +56,13 @@ We are proud of our talented and diverse [team](about_us). # Our sponsors and partners +* [NLnet](https://nlnet.nl) who have very kindly sponsored us with + over EUR 350,000 in various separate grants. +* [NGI POINTER](https://www.ngi.eu/ngi-projects/ngi-pointer/) who have + sponsored us with a EUR 200,000 Horizon 2020 Grant. +* [Mythic Beasts](http://mythic-beasts.com) who don't overcommit on + their VPS allocations (no memory ballooning), and put servers on + the fastest backbone Internet points. * [Purism](http://puri.sm) donates to us through [NLNet](nlnet) charitable gifting * [Raptor CS](http://raptorcs.com) has given us access to a powerful @@ -64,6 +75,37 @@ We are proud of our talented and diverse [team](about_us). See the upcoming [Hackathon](https://www.youtube.com/embed/Px6eakWja3Q"), deadline May 15th * The [[PowerPC Notebook]] Project +* [RED Semiconductor](http://redsemiconductor.com) is the commercial realisation of Libre-SOC technology that respects and actively supports Libre principles in its business objectives. +* [[fed4fire]] for supercomputer access for verilator simulations, + with thanks to Ghent University / IMEC. + +# Status and TODO + +This section covers more future tasks. A progress report +is available at the [[3d_gpu]] page. + +| Date | Task | bug | +| -------- | ----------------------------------------- | ----- | +| Oct 2020 | Integer OpenPOWER ISA v3.0 implemented | [[!bug 383]] | +| Sep 2020 | ECP5 FPGA running basic bare metal | [[!bug 22]] | +| Jun 2021 | 180nm GDS-II IMEC tapeout Jun 9th | [[!bug 199]] | +| TODO | Complete MMU for GNU/Linux OSes | [[!bug 51]] | +| TODO | ISA Simulators | [[!bug 241]] | +| TODO | power-gem5 Simulator | [[!bug 581]] | +| TODO | binutils support for SVP64 | [[!bug 550]] | +| TODO | gcc support for SVP64 | [[!bug 558]] | +| TODO | [[openpower/sv/svp64]] Vectorisation | [[!bug 583]] | +| TODO | In-order execution engine | | +| TODO | out-of-order execution engine | [[!bug 81]] | +| TODO | Video Instructions and libraries | [[!bug 137]] | +| TODO | IEEE754 FP HDL Library | [[!bug 48]] | +| TODO | Kazan 3D Vulkan Driver | [[!bug 54]] | +| TODO | MESA 3D Vulkan Driver | [[!bug 251]] | +| TODO | 3D instructions | [[!bug 252]] | +| TODO | cryptographic [[openpower/sv/bitmanip]] instructions | | +| TODO | [[crypto_router_asic]] (130nm?) | [[!bug 589]] | +| TODO | Kestrel BMC Port | | +| TODO | Debug Working Group (JTAG, DMI, FSI) | | # How Can I Help? @@ -72,7 +114,7 @@ funding and always appreciate more! If you are a Corporation or an individual you can donate tax-free to NLNet, and they can in turn gift our developers. Contact lkcl@lkcl.net for more information. -# How Can I Help as a Developer? +# How Can I Help as a Developer? If you want to write code with us (and receive donations from NLNet for doing so), keep reading. If you want to *learn* @@ -81,18 +123,22 @@ below. If there is anything else, just get in touch on the list, there is plenty to do. 1. First, join the - [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev), - introduce yourself (people will happily say "hello" back"). Read through - [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/) - and the [[charter]], and let everyone know, on the list that you're - happy with it and agree to it. + [mailing list](http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev), + introduce yourself (people will happily say "hello" back) and + the Libera IRC channel + (#libre-soc at irc.libera.chat port 6697, see +https://libera.chat/guides/connect), [logs here](https://libre-soc.org/irclog/latest.log.html). + Read through + [recent posts](http://lists.libre-soc.org/pipermail/libre-soc-dev/) + and the [[charter]], ask questions if you have any and let everyone know, + on the list that you're happy with it and agree to it. 2. The next thing you should do is read through the - [bugs list](http://bugs.libre-riscv.org) and + [bugs list](http://bugs.libre-soc.org) and see if there are any bugs that pique your interest. A fascinating way to do that is to view the [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR) 3. After that, go ahead and take a look at the - [git repositories](https://git.libre-riscv.org). + [git repositories](https://git.libre-soc.org). 4. If you plan to do HDL work, you should familiarize yourself with our [[HDL_workflow]]. If you would like to help with the ASIC layout, see [[HDL_workflow/coriolis2]] @@ -108,7 +154,8 @@ Also note that you can edit this wiki. You can experiment in the [[Sandbox]]. ## Quick peek at the code -Here is an example process of how to play with the soc code: +Here is an example process of how to play with the soc code. The last +step you will have needed to install yosys: pip3 install virtualenv requests mkdir ~/.virtualenvs && cd ~/.virtualenvs @@ -116,17 +163,34 @@ Here is an example process of how to play with the soc code: source ~/.virtualenvs/libresoc/bin/activate cd ~; mkdir libresoc; cd libresoc - git clone https://git.libre-riscv.org/git/nmutil.git - git clone https://git.libre-riscv.org/git/ieee754fpu.git - git clone https://git.libre-riscv.org/git/soc.git + git clone https://git.libre-soc.org/git/nmigen.git + git clone https://git.libre-soc.org/git/nmigen-soc.git + git clone https://git.libre-soc.org/git/nmutil.git + git clone https://git.libre-soc.org/git/openpower-isa.git + git clone https://git.libre-soc.org/git/c4m-jtag.git + git clone https://git.libre-soc.org/git/ieee754fpu.git + git clone https://git.libre-soc.org/git/soc.git - cd nmutil; make install; cd .. - cd ieee754fpu; make install; cd .. - cd soc; make gitupdate; make install; cd .. + cd nmigen; python setup.py develop; cd .. + cd nmigen-soc; python setup.py develop; cd .. + cd c4m-jtag; python setup.py develop; cd .. + cd nmutil; make develop; cd .. + cd openpower-isa; make develop; cd .. + cd ieee754fpu; make develop; cd .. + cd soc; make gitupdate; make develop - python3 soc/src/soc/decoder/power_decoder.py + python3 src/soc/decoder/power_decoder.py yosys -p "read_ilang decoder.il; show dec31" +The full install process may be automated using scripts found +here: +which you can clone with: + + git clone https://git.libre-soc.org/git/dev-env-setup.git + +A convenient page which gives step-by-step instructions is: +[[HDL_workflow/devscripts]] + ## How can I learn? The whole purpose of this project is to be a learning environment as well @@ -154,10 +218,13 @@ design. See [[HDL_workflow]] We also need to find a c++ engineer with compiler experience to work on a MESA 3D driver. This will begin life similar to SwiftShader however -retaining the vectorisation and predication intrinsics as well as hardware -accelerated opcodes (all of which SwiftShader lacks) +retaining the vectorisation and predication intrinsics then adding +hardware accelerated opcodes (all of which SwiftShader lacks) Also, individuals with experience in formal mathematical verification are quite welcome. -# [Documentation](Documentation/SOC/index) +# Documentation + + - [Source Code](/docs/) + - [Architecture](3d_gpu/architecture)