X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=index.mdwn;h=6f9b670c9a176fbeeec48e35fe4a137a4792211d;hb=85a87deaf9b9cc6843d044ba4e9bac63e3631afd;hp=d4807f3a68446833c4075f02a60fb210b0ea8521;hpb=9084ba61e804ef5b0c27a8a6ff5fd04f7c2480d4;p=libreriscv.git
diff --git a/index.mdwn b/index.mdwn
index d4807f3a6..6f9b670c9 100644
--- a/index.mdwn
+++ b/index.mdwn
@@ -1,127 +1,183 @@
-# Welcome to Libre-SoC ([provisionally renamed](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-January/003580.html) from Libre-RISCV)!
+
+
Welcome to Libre-SOC
+
+ We're building a chip. A fast chip. A safe chip. A trusted chip.
-LibreSOC strives to deliver a fully capable and competitive mass volume Libre integrated System on Chip for use in chromebooks, smartphone, tablets and industrial boards. We want to maximize the degree of trust a customer can place in their processor. We do this by providing the customer the freedom to study, modify, and redistribute the the bootloader and Operating System full source code *and* the full SoC source from HDL to VLSI.
+ A chip with lots of peripherals. And a VPU. And a 3D GPU...
-Right now, we're targeting a (quad core, 800mhz, dual issue, GPU, VPU, [and later an ML inference core] ) SOC.
+ Oh and here, have the source code...
+
+
-See our [[3d_gpu/mission_statement]]
+
Why should I care?
-## Why a Libre SOC?
+With Libre-SOC, you can take complex algorithms usually intended for
+power hungry servers with big fat GPUs, and run them on tiny devices
+like smartwatches, cellphones, and pocket drones without changing your
+code at all.
-Its quite hard to guarantee that a performant processors (think pipelined, out-of-order) are functionally perfectly correct. In fact, it often turns out that they [arenât](https://meltdownattack.com).
+
-There are entire [dissertations](http://www.kroening.com/diss/diss-kroe.pdf) dedicated to the subject matter of merely functionally verifying a pipeline (this doesnât even consider out of order execution).
+
Hasn't Somebody Already Done This?
-Given the fact that performant bug-free processors no longer exist, how can you trust your processor? The next best thing is to have access to a processorâs design files. Not only have access to them, you must have the freedom to study and improve them.
+To the best of our knowledge, no. The closest systems would be ARM Cortex
+devices which currently offer mediocre GPU and OpenCL support. Often
+times, it is quite difficult for customers to get their hands on the
+drivers and install them due to their locked down nature. Libre-SOC is
+providing our own Free/Libre drivers. Easy as 1, 2, 3!
-Such a processor is referred to as a Libre processor. However, processors themselves are only a part of the picture. Nowadays, most contemporary computing tasks involve artificial intelligence, media consumption, wireless connectivity, etc... Thus, we must deliver an entire LibreSOC.
+
-## Benefits: Privacy, Safety-Critical, Peace of Mind...
-Our LibreSOC will not have backdoors that plague modern [processors](https://www.csoonline.com/article/3220476/researchers-say-now-you-too-can-disable-intel-me-backdoor-thanks-to-the-nsa.html).
+
Does Open Hardware Really Work?
+
A few names come to mind:
-There is a very real need for reliable safety critical processors (think airplane, smart car, nuclear power plant, pacemaker...).
-LibreSOC posits that it is impossible to trust a processor in a safety critical environment without both access
-to that processor's source and a cycle accurate HDL simulator that guarantees developers their code behaves as they
-expect. An ISA level simulator is no longer satisfactory.
+
-Refer to this [IEEE article](https://ieeexplore.ieee.org/document/4519604) by Cyberphysical System expert Ed-Lee for more details.
+
+ Learn more
-## Still Have Questions?
+
-Read about the business and practical benefits of a LibreSOC below.
-[[why_a_libresoc]]
-# Join us in Realizing the First Market Ready LibreSOC!
+# Our Team
-1. First, join the
-[mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
-introduce yourself, and read through
-[recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
-and the [[charter]].
+We are proud of our talented and diverse [team](about_us).
-2. The next thing you should do is read through the [bugs
-list](http://bugs.libre-riscv.org) and see if there are any bugs that
-pique your interest.
+# Our sponsors and partners
-3. After that, go ahead and take a look at the [resources](#resources) section below.
-Try and clone a repository with ``git clone https://git.libre-riscv.org/git/repositoryname.git``
+* [Purism](http://puri.sm) donates to us through [NLNet](nlnet)
+ charitable gifting
+* [Raptor CS](http://raptorcs.com) has given us access to a powerful
+ 18-core 128 GB RAM TALOS II workstation, online.
+* [Raptor Engineering](https://raptorengineering.com) is providing
+ additional assistance including access to an [[shakti/m_class/LPC]]
+ interface (more to come)
+* [MarketNext](http://marketnext.org) is helping us connect to developer
+ resources in Emerging markets, for completion of NLNet-funded tasks.
+ See the upcoming [Hackathon](https://www.youtube.com/embed/Px6eakWja3Q"),
+ deadline May 15th
+* The [[PowerPC Notebook]] Project
+* [RED Semiconductor](http://redsemiconductor.com) is the commercial realisation of Libre-SOC technology that respects and actively supports Libre principles in its business objectives.
-4. If you plan to do HDL work, you should familiarize yourself with our [[HDL_workflow]].
+# How Can I Help?
-5. We do have funding available (see [[nlnet]]) upon completion of issues -
-we are also working on procuring more funding which gets the project to
-nanometre scale tapeout.
+If you would like to fund us, see [[funding]]. We currently have some
+funding and always appreciate more! If you are a Corporation or an
+individual you can donate tax-free to NLNet, and they can in turn gift
+our developers. Contact lkcl@lkcl.net for more information.
+
+# How Can I Help as a Developer?
-6. After all this, if you feel that Libre-SoC is a good cause that
-you would like to contribute to, add yourself to the [[current_members]]
-page, fill in some information about yourself, and join the mailing list
-and say hello.
+If you want to write code with us (and receive donations from NLNet
+for doing so), keep reading. If you want to *learn*
+so that you can write code with us, see "How can I learn" section,
+below. If there is anything else,
+just get in touch on the list, there is plenty to do.
-Also note that you can edit this wiki. See the last section of this page.
+1. First, join the
+ [mailing list](http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev),
+ introduce yourself (people will happily say "hello" back") and
+ the Freenode IRC channel
+ [#libre-soc](https://libre-soc.org/irclog/latest.log.html).
+ Read through
+ [recent posts](http://lists.libre-soc.org/pipermail/libre-soc-dev/)
+ and the [[charter]], ask questions if you have any and let everyone know,
+ on the list that you're happy with it and agree to it.
+2. The next thing you should do is read through the
+ [bugs list](http://bugs.libre-soc.org) and
+ see if there are any bugs that pique your interest.
+ A fascinating way to do that is to view the
+ [dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR)
+3. After that, go ahead and take a look at the
+ [git repositories](https://git.libre-soc.org).
+4. If you plan to do HDL work, you should familiarize yourself with our
+ [[HDL_workflow]]. If you would like to help with the ASIC layout,
+ see [[HDL_workflow/coriolis2]]
+5. We do have funding available (see [[nlnet]]) upon completion of issues -
+ we are also working on procuring more funding which gets the project to
+ nanometre scale tapeout.
+6. After all this, if you feel that Libre-SOC is a something
+ that you would like to contribute to, add yourself to the
+ [current_members](about_us) page, fill in some information about yourself,
+ and join the mailing list and say hello.
+
+Also note that you can edit this wiki. You can experiment in the [[Sandbox]].
+
+## Quick peek at the code
+
+Here is an example process of how to play with the soc code. The last
+step you will have needed to install yosys:
+
+ pip3 install virtualenv requests
+ mkdir ~/.virtualenvs && cd ~/.virtualenvs
+ python3 -m venv libresoc
+ source ~/.virtualenvs/libresoc/bin/activate
+
+ cd ~; mkdir libresoc; cd libresoc
+ git clone https://git.libre-soc.org/git/nmigen.git
+ git clone https://git.libre-soc.org/git/nmigen-soc.git
+ git clone https://git.libre-soc.org/git/nmutil.git
+ git clone https://git.libre-soc.org/git/c4m-jtag.git
+ git clone https://git.libre-soc.org/git/ieee754fpu.git
+ git clone https://git.libre-soc.org/git/soc.git
+
+ cd nmigen; python setup.py develop; cd ..
+ cd nmigen-soc; python setup.py develop; cd ..
+ cd c4m-jtag; python setup.py develop; cd ..
+ cd nmutil; make install; cd ..
+ cd ieee754fpu; make install; cd ..
+ cd soc; make gitupdate; make install; cd ..
+
+ python3 soc/src/soc/decoder/power_decoder.py
+ yosys -p "read_ilang decoder.il; show dec31"
+
+The full install process may be automated using scripts found
+here: