X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64mi%2Fdirty.S;h=731d80dc08559fc1e612e524d151fdc99ffefcb3;hb=9fc686ae1488a596d0bed561a750396911e71b01;hp=2be4921000a51578ac19fbcd584e7f691534bd55;hpb=08486cb632ef704709a89fc6bab5842bec4c2547;p=riscv-tests.git

diff --git a/isa/rv64mi/dirty.S b/isa/rv64mi/dirty.S
index 2be4921..731d80d 100644
--- a/isa/rv64mi/dirty.S
+++ b/isa/rv64mi/dirty.S
@@ -15,9 +15,10 @@ RVTEST_CODE_BEGIN
 
   # Turn on VM with superpage identity mapping
   la a1, page_table_1
+  srl a1, a1, RISCV_PGSHIFT
   csrw sptbr, a1
   sfence.vm
-  li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_PRV1 & ~(MSTATUS_PRV1<<1)) * PRV_S)
+  li a1, ((MSTATUS_VM & ~(MSTATUS_VM<<1)) * VM_SV39) | ((MSTATUS_MPP & ~(MSTATUS_MPP<<1)) * PRV_S)
   csrs mstatus, a1
   la a1, 1f
   csrw mepc, a1
@@ -32,6 +33,7 @@ RVTEST_CODE_BEGIN
   # Load new page table
   li TESTNUM, 3
   la t0, page_table_2
+  srl t0, t0, RISCV_PGSHIFT
   csrw sptbr, t0
   sfence.vm