X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=isa%2Frv64uv%2Futidx.S;h=564bf194408d910bc3781b5ddf757a43c9cb137a;hb=160bdaa323bc8f8e651f9f546822336cf17d92f5;hp=7de7a20c7c3a722eda106e6dbf16cbf6d876550f;hpb=57f2254feaf4e3595a5b6cce48ebcfbebaaa3c67;p=riscv-tests.git

diff --git a/isa/rv64uv/utidx.S b/isa/rv64uv/utidx.S
index 7de7a20..564bf19 100644
--- a/isa/rv64uv/utidx.S
+++ b/isa/rv64uv/utidx.S
@@ -1,3 +1,5 @@
+# See LICENSE for license details.
+
 #*****************************************************************************
 # utidx.S
 #-----------------------------------------------------------------------------
@@ -8,7 +10,7 @@
 #include "riscv_test.h"
 #include "test_macros.h"
 
-RVTEST_RV64U
+RVTEST_RV64UV
 RVTEST_CODE_BEGIN
 
   vsetcfg 2,0
@@ -24,7 +26,7 @@ RVTEST_CODE_BEGIN
   li a1,1
 loop:
   ld a0,0(a4)
-  addi x28,a1,2
+  addi TESTNUM,a1,2
   bne a0,a1,fail
   addi a4,a4,8
   addi a1,a1,1