X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=nmigen_soc%2Ftest%2Ftest_csr_wishbone.py;h=2cde268d2b2075d62a54fe7c382a3c65287f6118;hb=0d0ea2c843a8035d2e88181930cd38af6a2ab31d;hp=adfa590ed80ec2cbd966e9f4293a0afdb10ac261;hpb=5cd5d13c36e18d04f084d48ff1e9d9a997a140e9;p=nmigen-soc.git

diff --git a/nmigen_soc/test/test_csr_wishbone.py b/nmigen_soc/test/test_csr_wishbone.py
index adfa590..2cde268 100644
--- a/nmigen_soc/test/test_csr_wishbone.py
+++ b/nmigen_soc/test/test_csr_wishbone.py
@@ -4,8 +4,8 @@ import unittest
 from nmigen import Elaboratable, Signal, Module
 from nmigen.back.pysim import Simulator, Fragment
 
-from .. import csr
-from ..csr.wishbone import *
+from nmigen_soc import csr
+from nmigen_soc.csr.wishbone import WishboneCSRBridge
 
 
 class MockRegister(Elaboratable):