X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=opcodes%2Faarch64-asm.h;h=45749e51d6648bab31b84d0c3ba14dbfb8a65eb5;hb=67d89901506da74d00a482b7560237dce404b41c;hp=5e13de0483163bb9c1bec302150ee560dddee0e2;hpb=98907a704908c5877d929c57b2ddb2e5f899d9a9;p=binutils-gdb.git diff --git a/opcodes/aarch64-asm.h b/opcodes/aarch64-asm.h index 5e13de04831..45749e51d66 100644 --- a/opcodes/aarch64-asm.h +++ b/opcodes/aarch64-asm.h @@ -1,5 +1,5 @@ /* aarch64-asm.h -- Header file for aarch64-asm.c and aarch64-asm-2.c. - Copyright (C) 2012-2016 Free Software Foundation, Inc. + Copyright (C) 2012-2017 Free Software Foundation, Inc. Contributed by ARM Ltd. This file is part of the GNU opcodes library. @@ -54,10 +54,12 @@ AARCH64_DECL_OPD_INSERTER (ins_fpimm); AARCH64_DECL_OPD_INSERTER (ins_fbits); AARCH64_DECL_OPD_INSERTER (ins_aimm); AARCH64_DECL_OPD_INSERTER (ins_limm); +AARCH64_DECL_OPD_INSERTER (ins_inv_limm); AARCH64_DECL_OPD_INSERTER (ins_ft); AARCH64_DECL_OPD_INSERTER (ins_addr_simple); AARCH64_DECL_OPD_INSERTER (ins_addr_regoff); AARCH64_DECL_OPD_INSERTER (ins_addr_simm); +AARCH64_DECL_OPD_INSERTER (ins_addr_simm10); AARCH64_DECL_OPD_INSERTER (ins_addr_uimm12); AARCH64_DECL_OPD_INSERTER (ins_simd_addr_post); AARCH64_DECL_OPD_INSERTER (ins_cond); @@ -69,6 +71,7 @@ AARCH64_DECL_OPD_INSERTER (ins_hint); AARCH64_DECL_OPD_INSERTER (ins_prfop); AARCH64_DECL_OPD_INSERTER (ins_reg_extended); AARCH64_DECL_OPD_INSERTER (ins_reg_shifted); +AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4xvl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s6xvl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s9xvl); @@ -79,9 +82,20 @@ AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zi_u5); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw); AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw); +AARCH64_DECL_OPD_INSERTER (ins_sve_aimm); +AARCH64_DECL_OPD_INSERTER (ins_sve_asimm); +AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one); +AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two); +AARCH64_DECL_OPD_INSERTER (ins_sve_float_zero_one); AARCH64_DECL_OPD_INSERTER (ins_sve_index); +AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov); +AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index); AARCH64_DECL_OPD_INSERTER (ins_sve_reglist); AARCH64_DECL_OPD_INSERTER (ins_sve_scale); +AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm); +AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm); +AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1); +AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2); #undef AARCH64_DECL_OPD_INSERTER