X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=opcodes%2Fcrx-dis.c;h=df152f86fb618521068a331758357f68627adc66;hb=c7c7219d3a06a714e04e73ebd029811e6bd5bd37;hp=48c2d0c31018d2cc062117df117a13525bff7696;hpb=89a649f7aef1d435c136545f48b56c0660ae08ae;p=binutils-gdb.git diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c index 48c2d0c3101..df152f86fb6 100644 --- a/opcodes/crx-dis.c +++ b/opcodes/crx-dis.c @@ -1,23 +1,24 @@ /* Disassembler code for CRX. - Copyright 2004 Free Software Foundation, Inc. + Copyright 2004, 2005, 2007 Free Software Foundation, Inc. Contributed by Tomer Levi, NSC, Israel. Written by Tomer Levi. - This file is part of the GNU binutils and GDB, the GNU debugger. + This file is part of the GNU opcodes library. - This program is free software; you can redistribute it and/or modify it under - the terms of the GNU General Public License as published by the Free - Software Foundation; either version 2, or (at your option) + This library is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) any later version. - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for - more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, + MA 02110-1301, USA. */ #include "dis-asm.h" #include "sysdep.h" @@ -30,7 +31,7 @@ /* Extract 'n_bits' from 'a' starting from offset 'offs'. */ #define EXTRACT(a, offs, n_bits) \ - (n_bits == 32 ? (((a) >> (offs)) & ~0L) \ + (n_bits == 32 ? (((a) >> (offs)) & 0xffffffffL) \ : (((a) >> (offs)) & ((1 << (n_bits)) -1))) /* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */ @@ -112,8 +113,8 @@ static unsigned long build_mask (void); static int powerof2 (int); static int match_opcode (void); static void make_instruction (void); -static void print_arguments (ins *, struct disassemble_info *); -static void print_arg (argument *, struct disassemble_info *); +static void print_arguments (ins *, bfd_vma, struct disassemble_info *); +static void print_arg (argument *, bfd_vma, struct disassemble_info *); /* Retrieve the number of operands for the current assembled instruction. */ @@ -496,10 +497,12 @@ make_argument (argument * a, int start_bits) /* Print a single argument. */ static void -print_arg (argument *a, struct disassemble_info *info) +print_arg (argument *a, bfd_vma memaddr, struct disassemble_info *info) { LONGLONG longdisp, mask; - char sign_flag; + int sign_flag = 0; + int relative = 0; + bfd_vma number; int op_index = 0; char string[200]; PTR stream = info->stream; @@ -545,7 +548,7 @@ print_arg (argument *a, struct disassemble_info *info) func (stream, "%s", string); } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant); } else { @@ -554,11 +557,11 @@ print_arg (argument *a, struct disassemble_info *info) } } else - func (stream, "$0x%x", a->constant); + func (stream, "$0x%lx", a->constant); break; case arg_idxr: - func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r), + func (stream, "0x%lx(%s,%s,%d)", a->constant, getregname (a->r), getregname (a->i_r), powerof2 (a->scale)); break; @@ -567,7 +570,7 @@ print_arg (argument *a, struct disassemble_info *info) break; case arg_cr: - func (stream, "0x%x(%s)", a->constant, getregname (a->r)); + func (stream, "0x%lx(%s)", a->constant, getregname (a->r)); if (IS_INSN_TYPE (LD_STOR_INS_INC)) func (stream, "+"); @@ -581,10 +584,9 @@ print_arg (argument *a, struct disassemble_info *info) || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS) || IS_INSN_TYPE (COP_BRANCH_INS)) { - func (stream, "%c", '*'); + relative = 1; longdisp = a->constant; longdisp <<= 1; - sign_flag = '+'; switch (a->size) { @@ -595,7 +597,7 @@ print_arg (argument *a, struct disassemble_info *info) mask = ((LONGLONG)1 << a->size) - 1; if (longdisp & ((LONGLONG)1 << a->size)) { - sign_flag = '-'; + sign_flag = 1; longdisp = ~(longdisp) + 1; } a->constant = (unsigned long int) (longdisp & mask); @@ -606,12 +608,11 @@ print_arg (argument *a, struct disassemble_info *info) break; } - func (stream, "%c", sign_flag); } /* For branch Neq instruction it is 2*offset + 2. */ - if (IS_INSN_TYPE (BRANCH_NEQ_INS)) + else if (IS_INSN_TYPE (BRANCH_NEQ_INS)) a->constant = 2 * a->constant + 2; - if (IS_INSN_TYPE (LD_STOR_INS_INC) + else if (IS_INSN_TYPE (LD_STOR_INS_INC) || IS_INSN_TYPE (LD_STOR_INS) || IS_INSN_TYPE (STOR_IMM_INS) || IS_INSN_TYPE (CSTBIT_INS)) @@ -620,7 +621,10 @@ print_arg (argument *a, struct disassemble_info *info) if (instruction->operands[op_index].op_type == abs16) a->constant |= 0xFFFF0000; } - func (stream, "0x%x", a->constant); + func (stream, "%s", "0x"); + number = (relative ? memaddr : 0) + + (sign_flag ? -a->constant : a->constant); + (*info->print_address_func) (number, info); break; default: break; @@ -630,7 +634,7 @@ print_arg (argument *a, struct disassemble_info *info) /* Print all the arguments of CURRINSN instruction. */ static void -print_arguments (ins *currInsn, struct disassemble_info *info) +print_arguments (ins *currInsn, bfd_vma memaddr, struct disassemble_info *info) { int i; @@ -638,7 +642,7 @@ print_arguments (ins *currInsn, struct disassemble_info *info) { processing_argument_number = i; - print_arg (&currInsn->arg[i], info); + print_arg (&currInsn->arg[i], memaddr, info); if (i != currInsn->nargs - 1) info->fprintf_func (info->stream, ", "); @@ -652,10 +656,12 @@ make_instruction (void) { int i; unsigned int shift; - argument a; for (i = 0; i < currInsn.nargs; i++) { + argument a; + + memset (&a, 0, sizeof (a)); a.type = getargtype (instruction->operands[i].op_type); if (instruction->operands[i].op_type == cst4 || instruction->operands[i].op_type == rbase_dispu4) @@ -729,7 +735,7 @@ print_insn_crx (memaddr, info) if ((currInsn.nargs = get_number_of_operands ()) != 0) info->fprintf_func (info->stream, "\t"); make_instruction (); - print_arguments (&currInsn, info); + print_arguments (&currInsn, memaddr, info); return currInsn.size; }