X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=openpower%2Fisa%2Fpifixedstore.mdwn;h=8a45cd96858ca026ec0957baa7f2b50ec6c111c9;hb=8da557b61c8bf245998e165476555568644d960a;hp=96e326821a82cad547da2e24cd9e1ae85d4e3298;hpb=ba0b72aae986c6bc22c59c7bc994170e26cc5cc8;p=openpower-isa.git

diff --git a/openpower/isa/pifixedstore.mdwn b/openpower/isa/pifixedstore.mdwn
index 96e32682..8a45cd96 100644
--- a/openpower/isa/pifixedstore.mdwn
+++ b/openpower/isa/pifixedstore.mdwn
@@ -120,6 +120,16 @@ Pseudo-code:
     MEM(ea, 4) <- (RS)[XLEN-32:XLEN-1]
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum (RA)+ D.
+    (RS)[32:63] are stored into the word in storage addressed
+    by EA.
+
+    EA is placed into register RA.
+
+    If RA=0, the instruction form is invalid.
+
 Special Registers Altered:
 
     None