X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=openpower%2Fisa.mdwn;h=df1797b0b8752dee2ab4beb493952eb1b2854819;hb=85263dcfdd213916d12961c5ec61d30e07916082;hp=978f9868bc270ca1b54edd72f6c4a94fd96cb50a;hpb=65c361af6ad92fa4c0f46428f151ddc4ec9665e6;p=libreriscv.git

diff --git a/openpower/isa.mdwn b/openpower/isa.mdwn
index 978f9868b..df1797b0b 100644
--- a/openpower/isa.mdwn
+++ b/openpower/isa.mdwn
@@ -41,6 +41,11 @@ Explanation of the rules for twin register targets
 * [[isa/svfparith]]
 * [[isa/bitmanip]]
 
+Scalar "Post-Increment" Draft Load/Store with Update
+
+* [[isa/pifixedload]]
+* [[isa/pifixedstore]]
+
 Part of the DRAFT Simple-V Specification:
 
 * [[isa/simplev]]