X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=openpower%2Fisans_letter.mdwn;fp=openpower%2Fisans_letter.mdwn;h=744d40a742e5793ca1c9ec09e56a1001ca5f3e7b;hb=aa0f0cb5ed82c902fbb6c5d6c1a690f8e8f4656f;hp=c2d821d268ef522aa2e6192217c9475753507b88;hpb=cf0c96520932b509faa115238df197037e76bc9a;p=libreriscv.git

diff --git a/openpower/isans_letter.mdwn b/openpower/isans_letter.mdwn
index c2d821d26..744d40a74 100644
--- a/openpower/isans_letter.mdwn
+++ b/openpower/isans_letter.mdwn
@@ -84,7 +84,8 @@ Instructions that we need to add, which are a normal part of GPUs,
 include ATAN2, LOG, NORMALISE, YUV2RGB, Khronos Compliance FP mode
 (different from both IEEE754 and "NI" mode), and many more.  Many of
 these may turn out to be useful in a wider context: they however need
-to be fully isolated behind "mode-setting".
+to be fully isolated behind "mode-setting" before being in any way
+considered for Standards-track formal adoption.
 
 Some mode-setting instructions are privileged, i.e can only be set by
 the kernel (e.g 32 or 64 bit mode). Most of the escape sequences that we