X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=pinmux%2Fpinmux_chennai_2018.tex;h=37826be6ac81530371e0b5b04fadc6831c598511;hb=101740190d4512e6fc9c17a78757113c18712f4e;hp=a1bcb5a9173ea41ed9a503a1572d9f98af938bd5;hpb=48ccfa4d3bfb517dc72d7e828ec8bcc5631a2c5f;p=libreriscv.git diff --git a/pinmux/pinmux_chennai_2018.tex b/pinmux/pinmux_chennai_2018.tex index a1bcb5a91..37826be6a 100644 --- a/pinmux/pinmux_chennai_2018.tex +++ b/pinmux/pinmux_chennai_2018.tex @@ -14,7 +14,8 @@ \begin{center} \huge{Pin Multiplexer}\\ \vspace{32pt} - \Large{(Auto-generating documentation and resources for a Pinmux)}\\ + \Large{Auto-generating documentation, code \\ + and resources for a Pinmux}\\ \vspace{24pt} \Large{[proposed for] Chennai 9th RISC-V Workshop}\\ \vspace{16pt} @@ -31,6 +32,102 @@ } +\frame{\frametitle{Glossary} + + \begin{itemize} + \item Pin: an I/O pad. May be driven (input) or may drive (output). + \item FN: term for a single-wire "function", such as UART\_TX, + I2C\_SDA, SDMMC\_D0 etc. may be an input, output or both + (bi-directional case: two wires are always allocated, one + for input to the function and one for output from the function). + \item Input Priority Muxer: a multiplexer that has N selector + wires and N inputs, where the lowest (or highest) indexed + "selector" that is enabled results in its corresponding + input being routed to the output. + \item Output Demuxer: a one-to-many "redirector" where a single + input is "routed" to any one of a number of outputs, based + on a selection address. + \item GPIO: general-purpose reconfigureable I/O (Input/Output). + \end{itemize} +} + + +\frame{\frametitle{Muxer cases to handle} + + \begin{itemize} + \item Many FN outputs to Many Pins: no problem\\ + (weird configuration by end-user, but no damage to ASIC)\vspace{10pt} + \item One Pin to Many FN inputs: no problem\\ + (weird configuration by end-user, but no damage to ASIC)\vspace{10pt} + \item Many Pins to One FN input: {\bf Priority Mux needed}\\ + No priority mux: Pin1 = HI, Pin0 = LO, ASIC is damaged\vspace{10pt} + \item Some FNs (I2C\_SDA, SD\_D0..3) are I/O Buses\\ + Bi-directional control of the Pin must be handed to the + FN\vspace{10pt} + \item TODO\vspace{10pt} + \end{itemize} +} + + +\frame{\frametitle{Standard GPIO 4-way in/out Mux and I/O pad} + \begin{center} + \includegraphics[height=2.5in]{../shakti/m_class/mygpiomux.jpg}\\ + {\bf 4-in, 4-out, pullup/down, hysteresis, edge-detection (EINT)} + \end{center} +} + + +\frame{\frametitle{Register-to-pad "control" settings} + \begin{center} + \includegraphics[height=2.5in]{reg_gpio_cap_ctrl.jpg}\\ + {\bf pullup/down, hysteresis, current, edge-detection} + \end{center} +} + + +\frame{\frametitle{In/Out muxing, direction control} + \begin{center} + \includegraphics[height=2.5in]{reg_gpio_fn_ctrl.jpg}\\ + {\bf Note: function can control I/O direction} + \end{center} +} + + +\frame{\frametitle{Simplified I/O pad Block Diagram} + \begin{center} + \includegraphics[height=2.5in]{reg_gpio_pinblock.jpg}\\ + {\bf 3 wires: IN, OUT, OUTEN (also = !INEN) } + \end{center} +} + + +\frame{\frametitle{Output (and OUTEN) Wiring. 2 pins, 2 GPIO, 2 Fns} + \begin{center} + \includegraphics[height=2.5in]{reg_gpio_out_wiring.jpg}\\ + {\bf Reg0 for Pin0, Reg1 for Pin1, Output and OUTEN same mux } + \end{center} +} + + +\frame{\frametitle{Input Selection and Priority Muxing} + \begin{center} + \includegraphics[height=0.75in]{reg_gpio_comparator.jpg}\\ + {\bf Muxer enables input selection}\\ + \vspace{10pt} + \includegraphics[height=1.25in]{reg_gpio_in_prioritymux.jpg}\\ + {\bf However multiple inputs must be prioritised } + \end{center} +} + + +\frame{\frametitle{Input Mux Wiring} + \begin{center} + \includegraphics[height=2.5in]{reg_gpio_in_wiring.jpg}\\ + {\bf Pin Mux selection vals NOT same as FN selection vals} + \end{center} +} + + \frame{\frametitle{Summary} \begin{itemize}