X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fdebug_module.cc;h=1d184781495c3a94db14546d3a9f3c6f9ee8e775;hb=d3d3681f3468c633bc93a727a35bc07348245440;hp=2bc480a9ba6023a0098665cbbda6c974968d11fa;hpb=cd1e73b4eda7ec555f2cb832fe98d618c377ea65;p=riscv-isa-sim.git diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 2bc480a..1d18478 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -347,7 +347,8 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value) result = set_field(result, DMI_DMCONTROL_HALTREQ, dmcontrol.haltreq); result = set_field(result, DMI_DMCONTROL_RESUMEREQ, dmcontrol.resumereq); - result = set_field(result, DMI_DMCONTROL_HARTSEL, dmcontrol.hartsel); + result = set_field(result, ((1L<