X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Fdebug_module.h;h=8daf03b58caa9b783da3a45382db5e74944cbbaa;hb=12b772563a33b6c6c3da0343fbfc747b1eeea6b6;hp=fdeaaaccb86c8518f5029fab989ca97739393f3d;hpb=294a0572c47128564078ab78eb84bce5bdb80a79;p=riscv-isa-sim.git

diff --git a/riscv/debug_module.h b/riscv/debug_module.h
index fdeaaac..8daf03b 100644
--- a/riscv/debug_module.h
+++ b/riscv/debug_module.h
@@ -10,59 +10,51 @@ class sim_t;
 
 typedef struct {
   bool haltreq;
-  bool reset;
-  bool dmactive;
-  enum {
-    HARTSTATUS_HALTED,
-    HARTSTATUS_RUNNING,
-    HARTSTATUS_UNAVAILABLE,
-    HARTSTATUS_NOTEXIST
-  } hartstatus;
+  bool resumereq;
   unsigned hartsel;
-  bool authenticated;
-  bool authbusy;
-  enum {
-    AUTHTYPE_NOAUTH,
-    AUTHTYPE_PASSWORD,
-    AUTHTYPE_CHALLENGE
-  } authtype;
-  unsigned version;
+  bool hartreset;
+  bool dmactive;
+  bool ndmreset;
 } dmcontrol_t;
 
 typedef struct {
-  bool autoexec7;
-  bool autoexec6;
-  bool autoexec5;
-  bool autoexec4;
-  bool autoexec3;
-  bool autoexec2;
-  bool autoexec1;
-  bool autoexec0;
-  enum {
+  bool allnonexistant;
+  bool anynonexistant;
+  bool allunavail;
+  bool anyunavail;
+  bool allrunning;
+  bool anyrunning;
+  bool allhalted;
+  bool anyhalted;
+  bool allresumeack;
+  bool anyresumeack;
+  bool authenticated;
+  bool authbusy;
+  bool cfgstrvalid;
+  unsigned versionhi;
+  unsigned versionlo;
+} dmstatus_t;
+
+typedef enum cmderr {
     CMDERR_NONE = 0,
     CMDERR_BUSY = 1,
     CMDERR_NOTSUP = 2,
     CMDERR_EXCEPTION = 3,
     CMDERR_HALTRESUME = 4,
-    CMDERR_OTHER = 7
-  } cmderr;
+    CMDERR_OTHER = 7  
+} cmderr_t;
+
+typedef struct {
   bool busy;
   unsigned datacount;
+  unsigned progsize;
+  cmderr_t cmderr;
 } abstractcs_t;
 
-class debug_module_data_t : public abstract_device_t
-{
-  public:
-    debug_module_data_t();
-
-    bool load(reg_t addr, size_t len, uint8_t* bytes);
-    bool store(reg_t addr, size_t len, const uint8_t* bytes);
-
-    uint32_t read32(reg_t addr) const;
-    void write32(reg_t addr, uint32_t value);
-
-    uint8_t data[DEBUG_EXCHANGE_SIZE];
-};
+typedef struct {
+  unsigned autoexecprogbuf;
+  unsigned autoexecdata;
+} abstractauto_t;
 
 class debug_module_t : public abstract_device_t
 {
@@ -74,26 +66,6 @@ class debug_module_t : public abstract_device_t
     bool load(reg_t addr, size_t len, uint8_t* bytes);
     bool store(reg_t addr, size_t len, const uint8_t* bytes);
 
-    void set_interrupt(uint32_t hartid) {
-      interrupt.insert(hartid);
-    }
-    void clear_interrupt(uint32_t hartid) {
-      interrupt.erase(hartid);
-    }
-    bool get_interrupt(uint32_t hartid) const {
-      return interrupt.find(hartid) != interrupt.end();
-    }
-
-    void set_halt_notification(uint32_t hartid) {
-      halt_notification.insert(hartid);
-    }
-    void clear_halt_notification(uint32_t hartid) {
-      halt_notification.erase(hartid);
-    }
-    bool get_halt_notification(uint32_t hartid) const {
-      return halt_notification.find(hartid) != halt_notification.end();
-    }
-
     // Debug Module Interface that the debugger (in our case through JTAG DTM)
     // uses to access the DM.
     // Return true for success, false for failure.
@@ -104,17 +76,16 @@ class debug_module_t : public abstract_device_t
     static const unsigned progsize = 8;
 
     sim_t *sim;
-    // Track which interrupts from module to debugger are set.
-    std::set<uint32_t> interrupt;
-    // Track which halt notifications from debugger to module are set.
-    std::set<uint32_t> halt_notification;
 
     uint8_t debug_rom_entry[DEBUG_ROM_ENTRY_SIZE];
     uint8_t debug_rom_code[DEBUG_ROM_CODE_SIZE];
     uint8_t debug_rom_exception[DEBUG_ROM_EXCEPTION_SIZE];
     uint8_t program_buffer[progsize * 4];
+    uint8_t dmdata[DEBUG_DATA_SIZE];
+    
     bool halted[1024];
-    debug_module_data_t dmdata;
+    bool resumeack[1024];
+
     // Instruction that will be placed at the current hart's ROM entry address
     // after the current action has completed.
     uint32_t next_action;
@@ -124,11 +95,14 @@ class debug_module_t : public abstract_device_t
     uint32_t read32(uint8_t *rom, unsigned int index);
 
     dmcontrol_t dmcontrol;
+    dmstatus_t dmstatus;
     abstractcs_t abstractcs;
+    abstractauto_t abstractauto;
+    uint32_t command;
 
     processor_t *current_proc() const;
     void reset();
-    bool perform_abstract_command(uint32_t command);
+    bool perform_abstract_command();
 };
 
 #endif