X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Famoadd_d.h;fp=riscv%2Finsns%2Famoadd_d.h;h=bba975ce1fbccaf7357f02b71244bc8512dcc91a;hb=04c2d491c4bbb424a59273d4ebee62ddfe3379f9;hp=b8450bfd5038a76e7f1c762ebfa8b7f9bd08d1d5;hpb=b0af18ed449fb433ae5fce1cf8eb5e1e25ae9190;p=riscv-isa-sim.git

diff --git a/riscv/insns/amoadd_d.h b/riscv/insns/amoadd_d.h
index b8450bf..bba975c 100644
--- a/riscv/insns/amoadd_d.h
+++ b/riscv/insns/amoadd_d.h
@@ -1,4 +1,4 @@
 require_xpr64;
-reg_t v = mmu.load_uint64(RS1);
-mmu.store_uint64(RS1, RS2 + v);
+reg_t v = MMU.load_uint64(RS1);
+MMU.store_uint64(RS1, RS2 + v);
 RD = v;