X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Ffcvt_d_wu.h;h=1dbf218a1cfa95a4799bb9606e0d35d3f89c9e7f;hb=d6fce459767509249311a120fddb21c844dc9b2c;hp=61a8a788a34d41e6aa79e943b35cb09f5dc89993;hpb=77452a26e7d95d29dbaa797595ae683f03a3345b;p=riscv-isa-sim.git

diff --git a/riscv/insns/fcvt_d_wu.h b/riscv/insns/fcvt_d_wu.h
index 61a8a78..1dbf218 100644
--- a/riscv/insns/fcvt_d_wu.h
+++ b/riscv/insns/fcvt_d_wu.h
@@ -1,4 +1,5 @@
+require_extension('D');
 require_fp;
 softfloat_roundingMode = RM;
-FRD = ui32_to_f64((uint32_t)RS1);
+WRITE_FRD(ui32_to_f64((uint32_t)RS1));
 set_fp_exceptions;