X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finsns%2Ffmin_d.h;h=2a1755e30eb6db78cc1a43cb91e3796344545a82;hb=6642f8c745b320bdb7bab2470c62defb1b1bb9e2;hp=3d3d454e0dd27a7373b9c60ff212854d352094b0;hpb=77452a26e7d95d29dbaa797595ae683f03a3345b;p=riscv-isa-sim.git

diff --git a/riscv/insns/fmin_d.h b/riscv/insns/fmin_d.h
index 3d3d454..2a1755e 100644
--- a/riscv/insns/fmin_d.h
+++ b/riscv/insns/fmin_d.h
@@ -1,4 +1,6 @@
+require_extension('D');
 require_fp;
-FRD = isNaNF64UI(FRS2) || f64_lt_quiet(FRS1,FRS2) /* && FRS1 not NaN */
-      ? FRS1 : FRS2;
+WRITE_FRD(f64_lt_quiet(f64(FRS1), f64(FRS2)) || isNaNF64UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF64UI(FRS1) && isNaNF64UI(FRS2)) || softfloat_exceptionFlags)
+  WRITE_FRD(defaultNaNF64UI);
 set_fp_exceptions;