X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Finteractive.cc;h=69f2461d69be40f5f497858df583b88358085910;hb=fd6c5e5347b532be385fa260a77ebe94f6a6e7ab;hp=c4eb869d6c47462db98ca105a5aef91465c0439d;hpb=89be91cec3677f3f1143972de7ca85e2dc33dbff;p=riscv-isa-sim.git

diff --git a/riscv/interactive.cc b/riscv/interactive.cc
index c4eb869..69f2461 100644
--- a/riscv/interactive.cc
+++ b/riscv/interactive.cc
@@ -3,6 +3,7 @@
 #include "decode.h"
 #include "disasm.h"
 #include "sim.h"
+#include "mmu.h"
 #include "htif.h"
 #include <sys/mman.h>
 #include <termios.h>
@@ -66,6 +67,7 @@ void sim_t::interactive()
   funcs["reg"] = &sim_t::interactive_reg;
   funcs["fregs"] = &sim_t::interactive_fregs;
   funcs["fregd"] = &sim_t::interactive_fregd;
+  funcs["pc"] = &sim_t::interactive_pc;
   funcs["mem"] = &sim_t::interactive_mem;
   funcs["str"] = &sim_t::interactive_str;
   funcs["until"] = &sim_t::interactive_until;
@@ -108,9 +110,10 @@ void sim_t::interactive_help(const std::string& cmd, const std::vector<std::stri
 {
   std::cerr <<
     "Interactive commands:\n"
-    "reg <core> <reg>                # Display <reg> in <core>\n"
+    "reg <core> [reg]                # Display [reg] (all if omitted) in <core>\n"
     "fregs <core> <reg>              # Display single precision <reg> in <core>\n"
     "fregd <core> <reg>              # Display double precision <reg> in <core>\n"
+    "pc <core>                       # Show current PC in <core>\n"
     "mem <hex addr>                  # Show contents of physical memory\n"
     "str <hex addr>                  # Show NUL-terminated C string\n"
     "until reg <core> <reg> <val>    # Stop when <reg> in <core> hits <val>\n"
@@ -163,6 +166,11 @@ reg_t sim_t::get_pc(const std::vector<std::string>& args)
   return p->state.pc;
 }
 
+void sim_t::interactive_pc(const std::string& cmd, const std::vector<std::string>& args)
+{
+  fprintf(stderr, "0x%016" PRIx64 "\n", get_pc(args));
+}
+
 reg_t sim_t::get_reg(const std::vector<std::string>& args)
 {
   if(args.size() != 2)
@@ -176,9 +184,8 @@ reg_t sim_t::get_reg(const std::vector<std::string>& args)
     r = strtoul(args[1].c_str(), &ptr, 10);
     if (*ptr) {
       #define DECLARE_CSR(name, number) if (args[1] == #name) return p->get_csr(number);
-      if (0) ;
-      #include "encoding.h"
-      else r = NXPR;
+      #include "encoding.h"              // generates if's for all csrs
+      r = NXPR;                          // else case (csr name not found)
       #undef DECLARE_CSR
     }
   }
@@ -206,7 +213,17 @@ reg_t sim_t::get_freg(const std::vector<std::string>& args)
 
 void sim_t::interactive_reg(const std::string& cmd, const std::vector<std::string>& args)
 {
-  fprintf(stderr, "0x%016" PRIx64 "\n", get_reg(args));
+  if (args.size() == 1) {
+    // Show all the regs!
+    processor_t *p = get_core(args[0]);
+
+    for (int r = 0; r < NXPR; ++r) {
+      fprintf(stderr, "%-4s: 0x%016" PRIx64 "  ", xpr_name[r], p->state.XPR[r]);
+      if ((r + 1) % 4 == 0)
+        fprintf(stderr, "\n");
+    }
+  } else
+    fprintf(stderr, "0x%016" PRIx64 "\n", get_reg(args));
 }
 
 union fpr