X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=riscv%2Friscv.ac;h=68bcdb55d17f175ca1c8a52a0d2df768375d475d;hb=90bafe660b323250338fd564bb9ab4316576d59b;hp=b0b22827619ad9543449af4da20f8986bd18016b;hpb=287a1f87ca850b3583c27a1f178aaee28e02f2df;p=riscv-isa-sim.git diff --git a/riscv/riscv.ac b/riscv/riscv.ac index b0b2282..68bcdb5 100644 --- a/riscv/riscv.ac +++ b/riscv/riscv.ac @@ -1,9 +1,21 @@ +AC_LANG_CPLUSPLUS + +AC_ARG_WITH(isa, + [AS_HELP_STRING([--with-isa=RV64IMAFDC], + [Sets the default RISC-V ISA])], + AC_DEFINE_UNQUOTED([DEFAULT_ISA], "$withval", [Default value for --isa switch]), + AC_DEFINE_UNQUOTED([DEFAULT_ISA], "RV64IMAFDC", [Default value for --isa switch])) + +AC_SEARCH_LIBS([dlopen], [dl dld], [], [ + AC_MSG_ERROR([unable to find the dlopen() function]) +]) + AC_ARG_WITH([fesvr], [AS_HELP_STRING([--with-fesvr], [path to your fesvr installation if not in a standard location])], [ LDFLAGS="-L$withval/lib $LDFLAGS" - CFLAGS="-I$withval/include $CFLAGS" + CPPFLAGS="-I$withval/include $CPPFLAGS" ] ) @@ -11,19 +23,22 @@ AC_CHECK_LIB(fesvr, libfesvr_is_present, [], [AC_MSG_ERROR([libfesvr is required AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])]) -AC_CHECK_LIB(dl, dlopen, [], [AC_MSG_ERROR([libdl is required])]) +AC_ARG_ENABLE([commitlog], AS_HELP_STRING([--enable-commitlog], [Enable commit log generation])) +AS_IF([test "x$enable_commitlog" = "xyes"], [ + AC_DEFINE([RISCV_ENABLE_COMMITLOG],,[Enable commit log generation]) +]) -AC_ARG_ENABLE([fpu], AS_HELP_STRING([--disable-fpu], [Disable floating-point])) -AS_IF([test "x$enable_fpu" != "xno"], [ - AC_DEFINE([RISCV_ENABLE_FPU],,[Define if floating-point instructions are supported]) +AC_ARG_ENABLE([histogram], AS_HELP_STRING([--enable-histogram], [Enable PC histogram generation])) +AS_IF([test "x$enable_histogram" = "xyes"], [ + AC_DEFINE([RISCV_ENABLE_HISTOGRAM],,[Enable PC histogram generation]) ]) -AC_ARG_ENABLE([64bit], AS_HELP_STRING([--disable-64bit], [Disable 64-bit mode])) -AS_IF([test "x$enable_64bit" != "xno"], [ - AC_DEFINE([RISCV_ENABLE_64BIT],,[Define if 64-bit mode is supported]) +AC_ARG_ENABLE([dirty], AS_HELP_STRING([--enable-dirty], [Enable hardware management of PTE accessed and dirty bits])) +AS_IF([test "x$enable_dirty" = "xyes"], [ + AC_DEFINE([RISCV_ENABLE_DIRTY],,[Enable hardware management of PTE accessed and dirty bits]) ]) - -AC_ARG_ENABLE([commitlog], AS_HELP_STRING([--enable-commitlog], [Enable commit log generation])) -AS_IF([test "x$enable_commitlog" = "xyes"], [ - AC_DEFINE([RISCV_ENABLE_COMMITLOG],,[Enable commit log generation]) + +AC_ARG_ENABLE([misaligned], AS_HELP_STRING([--enable-misaligned], [Enable hardware support for misaligned loads and stores])) +AS_IF([test "x$enable_misaligned" = "xyes"], [ + AC_DEFINE([RISCV_ENABLE_MISALIGNED],,[Enable hardware support for misaligned loads and stores]) ])