X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=shakti%2Fm_class%2Fpinmux.mdwn;h=fdf7fed2190bfeaf385b548cb766b553d44d6f96;hb=f528f22979b8c972dfea86581928554b21f3fd6e;hp=79261c51b1057dd22dd6545ab076ee8a718e72bb;hpb=b095d798d8f7e2db2061c4e711bae1480cff69c6;p=libreriscv.git

diff --git a/shakti/m_class/pinmux.mdwn b/shakti/m_class/pinmux.mdwn
index 79261c51b..fdf7fed21 100644
--- a/shakti/m_class/pinmux.mdwn
+++ b/shakti/m_class/pinmux.mdwn
@@ -70,7 +70,7 @@ Introductions:
 Hardware available:
 
 * lkcl: ZC706
-* xing: zynq-7020 and Xilinx XC7A100T-484
+* xing: zynq-7020 and Xilinx XC7A100T-484 if needed contact him! <higuoxing@gmail.com>
 
 # Discussion and Links
 
@@ -85,6 +85,7 @@ Hardware available:
 * <https://github.com/xfguo/tbgen/blob/master/tbgen.py> auto-generated test module for verilog
 * <https://github.com/kdurant/verilog-testbench> described here <https://www.vim.org/scripts/script.php?script_id=4596>
 * <http://agilesoc.com/open-source-projects/svunit/> - SVunit - unit testing for verilog
+* [FPGA Overview](http://www.springer.com/cda/content/document/cda_downloaddocument/9781461435938-c2.pdf?SGWID=0-0-45-1333135-p174308376) Useful in writing GPIO related codes...
 
 # Pinouts Specification