X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=sim%2Ferc32%2FChangeLog;h=3853726430a07de00a5060f073a616c7f01a7c78;hb=2662c237a9219b0863535b8b99be383add2cf0b9;hp=088a2a4b459df733b4199dba6639cd728e557069;hpb=c1230d1bab8e36e1aa40f3bbadcef9b5d9ddc041;p=binutils-gdb.git diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog index 088a2a4b459..3853726430a 100644 --- a/sim/erc32/ChangeLog +++ b/sim/erc32/ChangeLog @@ -1,3 +1,118 @@ +2021-04-21 Mike Frysinger + + * aclocal.m4: Regenerate. + +2021-04-21 Simon Marchi + + * configure: Regenerate. + +2021-04-18 Mike Frysinger + + * configure: Regenerate. + +2021-04-15 John Baldwin + + * Makefile.in (READLINE_SRC, READLINE_CFLAGS): Add. + (SIM_EXTRA_CFLAGS): Add READLINE_CFLAGS. + * configure: Rebuild. + * configure.ac (READLINE_CFLAGS): Add. + +2021-04-08 Tom Tromey + + * func.c: Include sys/time.h. + +2021-04-08 Tom Tromey + + * sis.c (run_sim, main): Use new-style declaration. + * interf.c (run_sim, sim_open, sim_close, sim_load) + (sim_create_inferior, sim_store_register, sim_fetch_register) + (sim_info, sim_stop_reason, flush_windows, sim_do_command): Use + new-style declaration. + * help.c (usage, gen_help): Use new-style declaration. + * func.c (batch, set_regi, set_rega, disp_reg, limcalc) + (reset_stat, show_stat, init_bpt, int_handler, init_signals) + (disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event) + (init_event, set_int, advance_time, now, wait_for_irq, check_bpt) + (reset_all, sys_reset, sys_halt): Use new-style declaration. + * float.c (get_accex, clear_accex, set_fsr): Use new-style + declaration. + * exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec) + (chk_asi, execute_trap, check_interrupts, init_regs): Use + new-style declaration. + * erc32.c (init_sim, reset, decode_ersr, mecparerror) + (error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt) + (close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq) + (set_sfsr, mec_read, mec_write, init_stdio, restore_stdio) + (port_init, read_uart, write_uart, flush_uart, uarta_tx) + (uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr) + (wdog_start, rtc_intr, rtc_start, rtc_counter_read) + (rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start) + (gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl) + (memory_read, memory_write, get_mem_ptr, sis_memory_write) + (sis_memory_read): Use new-style declaration. + +2021-04-05 Tom Tromey + + * configure: Rebuild. + * configure.ac (READLINE): Adjust in-tree value. + +2021-04-02 Mike Frysinger + + * aclocal.m4, configure: Regenerate. + +2021-02-28 Mike Frysinger + + * configure: Regenerate. + +2021-02-27 Mike Frysinger + + * Makefile.in (SIM_EXTRA_ALL): Delete. + (all): New target. + +2021-02-21 Mike Frysinger + + * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4. + * aclocal.m4, configure: Regenerate. + +2021-02-13 Mike Frysinger + + * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS. + * aclocal.m4, configure: Regenerate. + +2021-02-06 Mike Frysinger + + * interf.c (sim_memory_map): Define. + +2021-02-06 Mike Frysinger + + * configure: Regenerate. + +2021-01-11 Mike Frysinger + + * configure.ac: Call SIM_AC_OPTION_WARNINGS. + * configure: Regenerate. + +2021-01-11 Mike Frysinger + + * config.in, configure: Regenerate. + * sis.c: Delete HAVE_STDLIB_H. + +2021-01-09 Mike Frysinger + + * configure: Regenerate. + +2021-01-08 Mike Frysinger + + * configure: Regenerate. + +2021-01-04 Mike Frysinger + + * configure: Regenerate. + +2020-07-29 Simon Marchi + + * configure: Re-generate. + 2018-10-30 Joel Sherrill * configure.ac: Remove the Cygwin-specific libtermcap.a hack