X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=sim%2Ffrv%2Fsim-main.h;h=e2b09a3778d186f2cbd9139b713a0ab3aa68eca0;hb=ef5058ae8714d68c0f671726618e721681523ac5;hp=ed75495353e95579a05c280521594c5f395db371;hpb=b811d2c2920ddcb1adcd438da38e90912b31f45f;p=binutils-gdb.git

diff --git a/sim/frv/sim-main.h b/sim/frv/sim-main.h
index ed75495353e..e2b09a3778d 100644
--- a/sim/frv/sim-main.h
+++ b/sim/frv/sim-main.h
@@ -1,5 +1,5 @@
 /* frv simulator support code
-   Copyright (C) 1998-2020 Free Software Foundation, Inc.
+   Copyright (C) 1998-2021 Free Software Foundation, Inc.
    Contributed by Red Hat.
 
 This file is part of the GNU simulators.
@@ -19,10 +19,6 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
 
 /* Main header for the frv.  */
 
-/* sim-basics.h includes config.h but cgen-types.h must be included before
-   sim-basics.h and cgen-types.h needs config.h.  */
-#include "config.h"
-
 /* This is a global setting.  Different cpu families can't mix-n-match -scache
    and -pbb.  However some cpu families may use -simple while others use
    one of -scache/-pbb. ???? */
@@ -108,16 +104,6 @@ struct _sim_cpu {
 #endif /* defined (WANT_CPU_FRVBF) */
 };
 
-/* The sim_state struct.  */
-
-struct sim_state {
-  sim_cpu *cpu[MAX_NR_PROCESSORS];
-
-  CGEN_STATE cgen_state;
-
-  sim_state_base base;
-};
-
 /* Misc.  */
 
 /* Catch address exceptions.  */