X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Faddrlib%2Finc%2Faddrinterface.h;h=98581e08bb9bf720a0bdb567bcd036f8171ef225;hb=6b75262941b55960e2f73d93f85020fa6c9c2d2f;hp=5fb3c46e489600235a8b7af4ec9e1a9c390e5453;hpb=69ea473eeb91b2c4db26402c3bc2ed5799d26605;p=mesa.git

diff --git a/src/amd/addrlib/inc/addrinterface.h b/src/amd/addrlib/inc/addrinterface.h
index 5fb3c46e489..98581e08bb9 100644
--- a/src/amd/addrlib/inc/addrinterface.h
+++ b/src/amd/addrlib/inc/addrinterface.h
@@ -2872,7 +2872,6 @@ typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT
     UINT_32             size;               ///< Size of this structure in bytes
 
     ADDR2_META_FLAGS    cMaskFlags;         ///< CMASK flags
-    ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
     AddrResourceType    resourceType;       ///< Color surface type
     AddrSwizzleMode     swizzleMode;        ///< FMask surface swizzle mode
     UINT_32             unalignedWidth;     ///< Color surface original width
@@ -2943,7 +2942,6 @@ typedef struct _ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
     UINT_32             slice;               ///< Index of slices
 
     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
-    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
     AddrResourceType    resourceType;        ///< Color surface type
     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
 
@@ -3002,7 +3000,6 @@ typedef struct _ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
     UINT_32             bitPosition;         ///< Bit position within addr, 0 or 4
 
     ADDR2_META_FLAGS    cMaskFlags;          ///< CMASK flags
-    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
     AddrResourceType    resourceType;        ///< Color surface type
     AddrSwizzleMode     swizzleMode;         ///< FMask surface swizzle mode
 
@@ -3260,7 +3257,6 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
     UINT_32             size;               ///< Size of this structure in bytes
 
     ADDR2_META_FLAGS    dccKeyFlags;        ///< DCC key flags
-    ADDR2_SURFACE_FLAGS colorFlags;         ///< Color surface flags
     AddrResourceType    resourceType;       ///< Color surface type
     AddrSwizzleMode     swizzleMode;        ///< Color surface swizzle mode
     UINT_32             bpp;                ///< bits per pixel
@@ -3349,17 +3345,23 @@ typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
     UINT_32             mipId;               ///< mipmap level id
 
     ADDR2_META_FLAGS    dccKeyFlags;         ///< DCC flags
-    ADDR2_SURFACE_FLAGS colorFlags;          ///< Color surface flags
     AddrResourceType    resourceType;        ///< Color surface type
     AddrSwizzleMode     swizzleMode;         ///< Color surface swizzle mode
     UINT_32             bpp;                 ///< Color surface bits per pixel
-    UINT_32             unalignedWidth;      ///< Color surface original width (of mip0)
-    UINT_32             unalignedHeight;     ///< Color surface original height (of mip0)
     UINT_32             numSlices;           ///< Color surface original slices (of mip0)
     UINT_32             numMipLevels;        ///< Color surface mipmap levels
     UINT_32             numFrags;            ///< Color surface fragment number
 
     UINT_32             pipeXor;             ///< pipe Xor setting
+    UINT_32             pitch;               ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::pitch
+    UINT_32             height;              ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::height
+    UINT_32             compressBlkWidth;    ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkWidth
+    UINT_32             compressBlkHeight;   ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkHeight
+    UINT_32             compressBlkDepth;    ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::compressBlkDepth
+    UINT_32             metaBlkWidth;        ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkWidth
+    UINT_32             metaBlkHeight;       ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkHeight
+    UINT_32             metaBlkDepth;        ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::metaBlkDepth
+    UINT_32             dccRamSliceSize;     ///< ADDR2_COMPUTE_DCC_INFO_OUTPUT::dccRamSliceSize
 } ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT;
 
 /**