X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fcommon%2Fac_llvm_build.c;h=54b7e98701585c13682a7a99a2955d8b66d5fce0;hb=a6a21e651d2cc17ce35394e2ea38b28127da1b84;hp=4052488f03ae174e750ac75e35486f2e7de86a61;hpb=4fc2d5e14125709d2eaa23d36f74f11bb760c73e;p=mesa.git diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 4052488f03a..54b7e987015 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -57,15 +57,15 @@ struct ac_llvm_flow { * The caller is responsible for initializing ctx::module and ctx::builder. */ void -ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context, +ac_llvm_context_init(struct ac_llvm_context *ctx, enum chip_class chip_class, enum radeon_family family) { LLVMValueRef args[1]; + ctx->context = LLVMContextCreate(); + ctx->chip_class = chip_class; ctx->family = family; - - ctx->context = context; ctx->module = NULL; ctx->builder = NULL; @@ -175,6 +175,8 @@ ac_get_type_size(LLVMTypeRef type) switch (kind) { case LLVMIntegerTypeKind: return LLVMGetIntTypeWidth(type) / 8; + case LLVMHalfTypeKind: + return 2; case LLVMFloatTypeKind: return 4; case LLVMDoubleTypeKind: @@ -320,6 +322,9 @@ void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize) case LLVMIntegerTypeKind: snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type)); break; + case LLVMHalfTypeKind: + snprintf(buf, bufsize, "f16"); + break; case LLVMFloatTypeKind: snprintf(buf, bufsize, "f32"); break; @@ -1098,6 +1103,31 @@ LLVMValueRef ac_build_buffer_load_format_gfx9_safe(struct ac_llvm_context *ctx, can_speculate, true); } +LLVMValueRef +ac_build_tbuffer_load_short(struct ac_llvm_context *ctx, + LLVMValueRef rsrc, + LLVMValueRef vindex, + LLVMValueRef voffset, + LLVMValueRef soffset, + LLVMValueRef immoffset) +{ + const char *name = "llvm.amdgcn.tbuffer.load.i32"; + LLVMTypeRef type = ctx->i32; + LLVMValueRef params[] = { + rsrc, + vindex, + voffset, + soffset, + immoffset, + LLVMConstInt(ctx->i32, V_008F0C_BUF_DATA_FORMAT_16, false), + LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, false), + ctx->i1false, + ctx->i1false, + }; + LLVMValueRef res = ac_build_intrinsic(ctx, name, type, params, 9, 0); + return LLVMBuildTrunc(ctx->builder, res, ctx->i16, ""); +} + /** * Set range metadata on an instruction. This can only be used on load and * call instructions. If you know an instruction can only produce the values @@ -1819,11 +1849,9 @@ LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx, { LLVMTypeRef v2f16 = LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2); - LLVMValueRef res = - ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", - v2f16, args, 2, - AC_FUNC_ATTR_READNONE); - return LLVMBuildBitCast(ctx->builder, res, ctx->i32, ""); + + return ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", v2f16, + args, 2, AC_FUNC_ATTR_READNONE); } /* Upper 16 bits must be zero. */ @@ -2747,11 +2775,13 @@ void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask, final_sample = LLVMBuildMul(ac->builder, addr[sample_chan], LLVMConstInt(ac->i32, 4, 0), ""); final_sample = LLVMBuildLShr(ac->builder, fmask_value, final_sample, ""); + /* Mask the sample index by 0x7, because 0x8 means an unknown value + * with EQAA, so those will map to 0. */ final_sample = LLVMBuildAnd(ac->builder, final_sample, - LLVMConstInt(ac->i32, 0xF, 0), ""); + LLVMConstInt(ac->i32, 0x7, 0), ""); /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK - * resource descriptor is 0 (invalid), + * resource descriptor is 0 (invalid). */ LLVMValueRef tmp; tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, ""); @@ -2995,7 +3025,7 @@ static LLVMValueRef ac_build_set_inactive(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef inactive) { - char name[32], type[8]; + char name[33], type[8]; LLVMTypeRef src_type = LLVMTypeOf(src); src = ac_to_integer(ctx, src); inactive = ac_to_integer(ctx, inactive);