X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fvulkan%2Fradv_debug.c;h=2177cda0f4a5ed016e2aea5b2ee65cca60a64e63;hb=2dd8dfd9137ac561aac3c453c1c7ad6683bd17b4;hp=97ccfac694fad91c3f6a112350c3b28c486bacd2;hpb=2aea6322923746aa182cb33e68be0dde39d41e1a;p=mesa.git diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 97ccfac694f..2177cda0f4a 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -29,8 +29,8 @@ #include #include +#include "util/mesa-sha1.h" #include "sid.h" -#include "gfx9d.h" #include "ac_debug.h" #include "radv_debug.h" #include "radv_shader.h" @@ -61,7 +61,9 @@ radv_init_trace(struct radv_device *device) device->trace_bo = ws->buffer_create(ws, TRACE_BO_SIZE, 8, RADEON_DOMAIN_VRAM, - RADEON_FLAG_CPU_ACCESS); + RADEON_FLAG_CPU_ACCESS| + RADEON_FLAG_NO_INTERPROCESS_SHARING, + RADV_BO_PRIORITY_UPLOAD_BUFFER); if (!device->trace_bo) return false; @@ -78,7 +80,7 @@ radv_init_trace(struct radv_device *device) } static void -radv_dump_trace(struct radv_device *device, struct radeon_winsys_cs *cs) +radv_dump_trace(struct radv_device *device, struct radeon_cmdbuf *cs) { const char *filename = getenv("RADV_TRACE_FILE"); FILE *f = fopen(filename, "w"); @@ -128,7 +130,7 @@ radv_dump_debug_registers(struct radv_device *device, FILE *f) radv_dump_mmapped_reg(device, f, R_00803C_GRBM_STATUS_SE3); radv_dump_mmapped_reg(device, f, R_00D034_SDMA0_STATUS_REG); radv_dump_mmapped_reg(device, f, R_00D834_SDMA1_STATUS_REG); - if (info->chip_class <= VI) { + if (info->chip_class <= GFX8) { radv_dump_mmapped_reg(device, f, R_000E50_SRBM_STATUS); radv_dump_mmapped_reg(device, f, R_000E4C_SRBM_STATUS2); radv_dump_mmapped_reg(device, f, R_000E54_SRBM_STATUS3); @@ -367,11 +369,9 @@ static void si_add_split_disasm(const char *disasm, } static void -radv_dump_annotated_shader(struct radv_pipeline *pipeline, - struct radv_shader_variant *shader, - gl_shader_stage stage, - struct ac_wave_info *waves, unsigned num_waves, - FILE *f) +radv_dump_annotated_shader(struct radv_shader_variant *shader, + gl_shader_stage stage, struct ac_wave_info *waves, + unsigned num_waves, FILE *f) { uint64_t start_addr, end_addr; unsigned i; @@ -442,28 +442,22 @@ radv_dump_annotated_shader(struct radv_pipeline *pipeline, static void radv_dump_annotated_shaders(struct radv_pipeline *pipeline, - struct radv_shader_variant *compute_shader, - FILE *f) + VkShaderStageFlagBits active_stages, FILE *f) { struct ac_wave_info waves[AC_MAX_WAVES_PER_CHIP]; unsigned num_waves = ac_get_wave_info(waves); - unsigned mask; fprintf(f, COLOR_CYAN "The number of active waves = %u" COLOR_RESET "\n\n", num_waves); /* Dump annotated active graphics shaders. */ - mask = pipeline->active_stages; - while (mask) { - int stage = u_bit_scan(&mask); + while (active_stages) { + int stage = u_bit_scan(&active_stages); - radv_dump_annotated_shader(pipeline, pipeline->shaders[stage], + radv_dump_annotated_shader(pipeline->shaders[stage], stage, waves, num_waves, f); } - radv_dump_annotated_shader(pipeline, compute_shader, - MESA_SHADER_COMPUTE, waves, num_waves, f); - /* Print waves executing shaders that are not currently bound. */ unsigned i; bool found = false; @@ -495,56 +489,77 @@ radv_dump_shader(struct radv_pipeline *pipeline, if (!shader) return; - fprintf(f, "%s:\n%s\n\n", radv_get_shader_name(shader, stage), - shader->disasm_string); + fprintf(f, "%s:\n\n", radv_get_shader_name(shader, stage)); + + if (shader->spirv) { + unsigned char sha1[21]; + char sha1buf[41]; + + _mesa_sha1_compute(shader->spirv, shader->spirv_size, sha1); + _mesa_sha1_format(sha1buf, sha1); + + fprintf(f, "SPIRV (sha1: %s):\n", sha1buf); + radv_print_spirv(shader->spirv, shader->spirv_size, f); + } + + if (shader->nir) { + fprintf(f, "NIR:\n"); + nir_print_shader(shader->nir, f); + } + + fprintf(f, "LLVM IR:\n%s\n", shader->llvm_ir_string); + fprintf(f, "DISASM:\n%s\n", shader->disasm_string); radv_shader_dump_stats(pipeline->device, shader, stage, f); } static void radv_dump_shaders(struct radv_pipeline *pipeline, - struct radv_shader_variant *compute_shader, FILE *f) + VkShaderStageFlagBits active_stages, FILE *f) { - unsigned mask; - /* Dump active graphics shaders. */ - mask = pipeline->active_stages; - while (mask) { - int stage = u_bit_scan(&mask); + while (active_stages) { + int stage = u_bit_scan(&active_stages); radv_dump_shader(pipeline, pipeline->shaders[stage], stage, f); } +} - radv_dump_shader(pipeline, compute_shader, MESA_SHADER_COMPUTE, f); +static void +radv_dump_pipeline_state(struct radv_pipeline *pipeline, + VkShaderStageFlagBits active_stages, FILE *f) +{ + radv_dump_shaders(pipeline, active_stages, f); + radv_dump_annotated_shaders(pipeline, active_stages, f); + radv_dump_descriptors(pipeline, f); } static void radv_dump_graphics_state(struct radv_pipeline *graphics_pipeline, struct radv_pipeline *compute_pipeline, FILE *f) { - struct radv_shader_variant *compute_shader = - compute_pipeline ? compute_pipeline->shaders[MESA_SHADER_COMPUTE] : NULL; + VkShaderStageFlagBits active_stages; - if (!graphics_pipeline) - return; + if (graphics_pipeline) { + active_stages = graphics_pipeline->active_stages; + radv_dump_pipeline_state(graphics_pipeline, active_stages, f); + } - radv_dump_shaders(graphics_pipeline, compute_shader, f); - radv_dump_annotated_shaders(graphics_pipeline, compute_shader, f); - radv_dump_descriptors(graphics_pipeline, f); + if (compute_pipeline) { + active_stages = VK_SHADER_STAGE_COMPUTE_BIT; + radv_dump_pipeline_state(compute_pipeline, active_stages, f); + } } static void radv_dump_compute_state(struct radv_pipeline *compute_pipeline, FILE *f) { + VkShaderStageFlagBits active_stages = VK_SHADER_STAGE_COMPUTE_BIT; + if (!compute_pipeline) return; - radv_dump_shaders(compute_pipeline, - compute_pipeline->shaders[MESA_SHADER_COMPUTE], f); - radv_dump_annotated_shaders(compute_pipeline, - compute_pipeline->shaders[MESA_SHADER_COMPUTE], - f); - radv_dump_descriptors(compute_pipeline, f); + radv_dump_pipeline_state(compute_pipeline, active_stages, f); } static struct radv_pipeline * @@ -581,35 +596,39 @@ radv_dump_dmesg(FILE *f) pclose(p); } -static void +void radv_dump_enabled_options(struct radv_device *device, FILE *f) { uint64_t mask; - fprintf(f, "Enabled debug options: "); + if (device->instance->debug_flags) { + fprintf(f, "Enabled debug options: "); - mask = device->debug_flags; - while (mask) { - int i = u_bit_scan64(&mask); - fprintf(f, "%s, ", radv_get_debug_option_name(i)); + mask = device->instance->debug_flags; + while (mask) { + int i = u_bit_scan64(&mask); + fprintf(f, "%s, ", radv_get_debug_option_name(i)); + } + fprintf(f, "\n"); } - fprintf(f, "\n"); - fprintf(f, "Enabled perftest options: "); + if (device->instance->perftest_flags) { + fprintf(f, "Enabled perftest options: "); - mask = device->instance->perftest_flags; - while (mask) { - int i = u_bit_scan64(&mask); - fprintf(f, "%s, ", radv_get_perftest_option_name(i)); + mask = device->instance->perftest_flags; + while (mask) { + int i = u_bit_scan64(&mask); + fprintf(f, "%s, ", radv_get_perftest_option_name(i)); + } + fprintf(f, "\n"); } - fprintf(f, "\n"); } static void radv_dump_device_name(struct radv_device *device, FILE *f) { struct radeon_info *info = &device->physical_device->rad_info; - char llvm_string[32] = {}, kernel_version[128] = {}; + char kernel_version[128] = {}; struct utsname uname_data; const char *chip_name; @@ -619,16 +638,11 @@ radv_dump_device_name(struct radv_device *device, FILE *f) snprintf(kernel_version, sizeof(kernel_version), " / %s", uname_data.release); - if (HAVE_LLVM > 0) { - snprintf(llvm_string, sizeof(llvm_string), - ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff, - HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); - } - - fprintf(f, "Device name: %s (%s DRM %i.%i.%i%s%s)\n\n", + fprintf(f, "Device name: %s (%s DRM %i.%i.%i%s, LLVM " + MESA_LLVM_VERSION_STRING ")\n\n", chip_name, device->physical_device->name, info->drm_major, info->drm_minor, info->drm_patchlevel, - kernel_version, llvm_string); + kernel_version); } static bool @@ -643,7 +657,7 @@ radv_gpu_hang_occured(struct radv_queue *queue, enum ring_type ring) } void -radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs) +radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs) { struct radv_pipeline *graphics_pipeline, *compute_pipeline; struct radv_device *device = queue->device; @@ -694,7 +708,7 @@ radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_winsys_cs *cs) } void -radv_print_spirv(struct radv_shader_module *module, FILE *fp) +radv_print_spirv(uint32_t *data, uint32_t size, FILE *fp) { char path[] = "/tmp/fileXXXXXX"; char line[2048], command[128]; @@ -706,7 +720,7 @@ radv_print_spirv(struct radv_shader_module *module, FILE *fp) if (fd < 0) return; - if (write(fd, module->data, module->size) == -1) + if (write(fd, data, size) == -1) goto fail; sprintf(command, "spirv-dis %s", path);