X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fvulkan%2Fradv_device.c;h=4b64f5101ed3fb187cc9873f0ca0d17842e270a0;hb=6b0b8f132aa8f13be36835c23232374bf9fd82ab;hp=5a54c5842abaee170ca55d847d5ccb2f4d5c7657;hpb=4e1bbb000cdfe4ba01bee5a6868c54fed7285dae;p=mesa.git diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 5a54c5842ab..4b64f5101ed 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -49,6 +49,7 @@ #include "util/debug.h" #include "util/mesa-sha1.h" #include "compiler/glsl_types.h" +#include "util/xmlpool.h" static int radv_device_get_cache_uuid(enum radeon_family family, void *uuid) @@ -88,7 +89,6 @@ static void radv_get_device_name(enum radeon_family family, char *name, size_t name_len) { const char *chip_string; - char llvm_string[32] = {}; switch (family) { case CHIP_TAHITI: chip_string = "AMD RADV TAHITI"; break; @@ -112,15 +112,13 @@ radv_get_device_name(enum radeon_family family, char *name, size_t name_len) case CHIP_VEGAM: chip_string = "AMD RADV VEGA M"; break; case CHIP_VEGA10: chip_string = "AMD RADV VEGA10"; break; case CHIP_VEGA12: chip_string = "AMD RADV VEGA12"; break; + case CHIP_VEGA20: chip_string = "AMD RADV VEGA20"; break; case CHIP_RAVEN: chip_string = "AMD RADV RAVEN"; break; case CHIP_RAVEN2: chip_string = "AMD RADV RAVEN2"; break; default: chip_string = "AMD RADV unknown"; break; } - snprintf(llvm_string, sizeof(llvm_string), - " (LLVM %i.%i.%i)", (HAVE_LLVM >> 8) & 0xff, - HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); - snprintf(name, name_len, "%s%s", chip_string, llvm_string); + snprintf(name, name_len, "%s (LLVM " MESA_LLVM_VERSION_STRING ")", chip_string); } static uint64_t @@ -338,7 +336,7 @@ radv_physical_device_init(struct radv_physical_device *device, device->rad_info.chip_class > GFX9) fprintf(stderr, "WARNING: radv is not a conformant vulkan implementation, testing use only.\n"); - radv_get_driver_uuid(&device->device_uuid); + radv_get_driver_uuid(&device->driver_uuid); radv_get_device_uuid(&device->rad_info, &device->device_uuid); if (device->rad_info.family == CHIP_STONEY || @@ -481,6 +479,7 @@ static const struct debug_control radv_perftest_options[] = { {"sisched", RADV_PERFTEST_SISCHED}, {"localbos", RADV_PERFTEST_LOCAL_BOS}, {"dccmsaa", RADV_PERFTEST_DCC_MSAA}, + {"bolist", RADV_PERFTEST_BO_LIST}, {NULL, 0} }; @@ -523,6 +522,20 @@ static int radv_get_instance_extension_index(const char *name) return -1; } +static const char radv_dri_options_xml[] = +DRI_CONF_BEGIN + DRI_CONF_SECTION_QUALITY + DRI_CONF_ADAPTIVE_SYNC("true") + DRI_CONF_SECTION_END +DRI_CONF_END; + +static void radv_init_dri_options(struct radv_instance *instance) +{ + driParseOptionInfo(&instance->available_dri_options, radv_dri_options_xml); + driParseConfigFiles(&instance->dri_options, + &instance->available_dri_options, + 0, "radv", NULL); +} VkResult radv_CreateInstance( const VkInstanceCreateInfo* pCreateInfo, @@ -586,9 +599,11 @@ VkResult radv_CreateInstance( } _mesa_locale_init(); + glsl_type_singleton_init_or_ref(); VG(VALGRIND_CREATE_MEMPOOL(instance, 0, false)); + radv_init_dri_options(instance); radv_handle_per_app_options(instance, pCreateInfo->pApplicationInfo); *pInstance = radv_instance_to_handle(instance); @@ -611,9 +626,12 @@ void radv_DestroyInstance( VG(VALGRIND_DESTROY_MEMPOOL(instance)); - _mesa_glsl_release_types(); + glsl_type_singleton_decref(); _mesa_locale_fini(); + driDestroyOptionCache(&instance->dri_options); + driDestroyOptionInfo(&instance->available_dri_options); + vk_debug_report_instance_destroy(&instance->debug_report_callbacks); vk_free(&instance->alloc, instance); @@ -776,8 +794,8 @@ void radv_GetPhysicalDeviceFeatures2( RADV_FROM_HANDLE(radv_physical_device, pdevice, physicalDevice); vk_foreach_struct(ext, pFeatures->pNext) { switch (ext->sType) { - case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTER_FEATURES: { - VkPhysicalDeviceVariablePointerFeatures *features = (void *)ext; + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VARIABLE_POINTERS_FEATURES: { + VkPhysicalDeviceVariablePointersFeatures *features = (void *)ext; features->variablePointersStorageBuffer = true; features->variablePointers = true; break; @@ -789,9 +807,9 @@ void radv_GetPhysicalDeviceFeatures2( features->multiviewTessellationShader = true; break; } - case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DRAW_PARAMETER_FEATURES: { - VkPhysicalDeviceShaderDrawParameterFeatures *features = - (VkPhysicalDeviceShaderDrawParameterFeatures*)ext; + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_DRAW_PARAMETERS_FEATURES: { + VkPhysicalDeviceShaderDrawParametersFeatures *features = + (VkPhysicalDeviceShaderDrawParametersFeatures*)ext; features->shaderDrawParameters = true; break; } @@ -814,7 +832,7 @@ void radv_GetPhysicalDeviceFeatures2( case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SAMPLER_YCBCR_CONVERSION_FEATURES: { VkPhysicalDeviceSamplerYcbcrConversionFeatures *features = (VkPhysicalDeviceSamplerYcbcrConversionFeatures*)ext; - features->samplerYcbcrConversion = false; + features->samplerYcbcrConversion = true; break; } case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_DESCRIPTOR_INDEXING_FEATURES_EXT: { @@ -823,13 +841,13 @@ void radv_GetPhysicalDeviceFeatures2( features->shaderInputAttachmentArrayDynamicIndexing = true; features->shaderUniformTexelBufferArrayDynamicIndexing = true; features->shaderStorageTexelBufferArrayDynamicIndexing = true; - features->shaderUniformBufferArrayNonUniformIndexing = false; - features->shaderSampledImageArrayNonUniformIndexing = false; - features->shaderStorageBufferArrayNonUniformIndexing = false; - features->shaderStorageImageArrayNonUniformIndexing = false; - features->shaderInputAttachmentArrayNonUniformIndexing = false; - features->shaderUniformTexelBufferArrayNonUniformIndexing = false; - features->shaderStorageTexelBufferArrayNonUniformIndexing = false; + features->shaderUniformBufferArrayNonUniformIndexing = true; + features->shaderSampledImageArrayNonUniformIndexing = true; + features->shaderStorageBufferArrayNonUniformIndexing = true; + features->shaderStorageImageArrayNonUniformIndexing = true; + features->shaderInputAttachmentArrayNonUniformIndexing = true; + features->shaderUniformTexelBufferArrayNonUniformIndexing = true; + features->shaderStorageTexelBufferArrayNonUniformIndexing = true; features->descriptorBindingUniformBufferUpdateAfterBind = true; features->descriptorBindingSampledImageUpdateAfterBind = true; features->descriptorBindingStorageImageUpdateAfterBind = true; @@ -875,9 +893,9 @@ void radv_GetPhysicalDeviceFeatures2( features->memoryPriority = VK_TRUE; break; } - case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_ADDRESS_FEATURES_EXT: { - VkPhysicalDeviceBufferAddressFeaturesEXT *features = - (VkPhysicalDeviceBufferAddressFeaturesEXT *)ext; + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_BUFFER_DEVICE_ADDRESS_FEATURES_EXT: { + VkPhysicalDeviceBufferDeviceAddressFeaturesEXT *features = + (VkPhysicalDeviceBufferDeviceAddressFeaturesEXT *)ext; features->bufferDeviceAddress = true; features->bufferDeviceAddressCaptureReplay = false; features->bufferDeviceAddressMultiDevice = false; @@ -895,6 +913,59 @@ void radv_GetPhysicalDeviceFeatures2( features->hostQueryReset = true; break; } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_8BIT_STORAGE_FEATURES_KHR: { + VkPhysicalDevice8BitStorageFeaturesKHR *features = + (VkPhysicalDevice8BitStorageFeaturesKHR*)ext; + bool enabled = pdevice->rad_info.chip_class >= VI; + features->storageBuffer8BitAccess = enabled; + features->uniformAndStorageBuffer8BitAccess = enabled; + features->storagePushConstant8 = enabled; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT16_INT8_FEATURES_KHR: { + VkPhysicalDeviceFloat16Int8FeaturesKHR *features = + (VkPhysicalDeviceFloat16Int8FeaturesKHR*)ext; + features->shaderFloat16 = pdevice->rad_info.chip_class >= VI && HAVE_LLVM >= 0x0800; + features->shaderInt8 = true; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR: { + VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *features = + (VkPhysicalDeviceShaderAtomicInt64FeaturesKHR *)ext; + /* TODO: Enable this once the driver supports 64-bit + * compare&swap atomic operations. + */ + features->shaderBufferInt64Atomics = false; + features->shaderSharedInt64Atomics = false; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_FEATURES_EXT: { + VkPhysicalDeviceInlineUniformBlockFeaturesEXT *features = + (VkPhysicalDeviceInlineUniformBlockFeaturesEXT *)ext; + + features->inlineUniformBlock = true; + features->descriptorBindingInlineUniformBlockUpdateAfterBind = true; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_COMPUTE_SHADER_DERIVATIVES_FEATURES_NV: { + VkPhysicalDeviceComputeShaderDerivativesFeaturesNV *features = + (VkPhysicalDeviceComputeShaderDerivativesFeaturesNV *)ext; + features->computeDerivativeGroupQuads = false; + features->computeDerivativeGroupLinear = true; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_YCBCR_IMAGE_ARRAYS_FEATURES_EXT: { + VkPhysicalDeviceYcbcrImageArraysFeaturesEXT *features = + (VkPhysicalDeviceYcbcrImageArraysFeaturesEXT*)ext; + features->ycbcrImageArrays = true; + break; + } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_UNIFORM_BUFFER_STANDARD_LAYOUT_FEATURES_KHR: { + VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR *features = + (VkPhysicalDeviceUniformBufferStandardLayoutFeaturesKHR *)ext; + features->uniformBufferStandardLayout = true; + break; + } default: break; } @@ -1189,7 +1260,8 @@ void radv_GetPhysicalDeviceProperties2( properties->robustBufferAccessUpdateAfterBind = false; properties->quadDivergentImplicitLod = false; - size_t max_descriptor_set_size = ((1ull << 31) - 16 * MAX_DYNAMIC_BUFFERS) / + size_t max_descriptor_set_size = ((1ull << 31) - 16 * MAX_DYNAMIC_BUFFERS - + MAX_INLINE_UNIFORM_BLOCK_SIZE * MAX_INLINE_UNIFORM_BLOCK_COUNT) / (32 /* uniform buffer, 32 due to potential space wasted on alignment */ + 32 /* storage buffer, 32 due to potential space wasted on alignment */ + 32 /* sampler, largest when combined with image */ + @@ -1252,9 +1324,7 @@ void radv_GetPhysicalDeviceProperties2( memset(driver_props->driverInfo, 0, VK_MAX_DRIVER_INFO_SIZE_KHR); snprintf(driver_props->driverInfo, VK_MAX_DRIVER_INFO_SIZE_KHR, "Mesa " PACKAGE_VERSION MESA_GIT_SHA1 - " (LLVM %d.%d.%d)", - (HAVE_LLVM >> 8) & 0xff, HAVE_LLVM & 0xff, - MESA_LLVM_VERSION_PATCH); + " (LLVM " MESA_LLVM_VERSION_STRING ")"); driver_props->conformanceVersion = (VkConformanceVersionKHR) { .major = 1, @@ -1279,6 +1349,17 @@ void radv_GetPhysicalDeviceProperties2( properties->transformFeedbackDraw = true; break; } + case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_INLINE_UNIFORM_BLOCK_PROPERTIES_EXT: { + VkPhysicalDeviceInlineUniformBlockPropertiesEXT *props = + (VkPhysicalDeviceInlineUniformBlockPropertiesEXT *)ext; + + props->maxInlineUniformBlockSize = MAX_INLINE_UNIFORM_BLOCK_SIZE; + props->maxPerStageDescriptorInlineUniformBlocks = MAX_INLINE_UNIFORM_BLOCK_SIZE * MAX_SETS; + props->maxPerStageDescriptorUpdateAfterBindInlineUniformBlocks = MAX_INLINE_UNIFORM_BLOCK_SIZE * MAX_SETS; + props->maxDescriptorSetInlineUniformBlocks = MAX_INLINE_UNIFORM_BLOCK_COUNT; + props->maxDescriptorSetUpdateAfterBindInlineUniformBlocks = MAX_INLINE_UNIFORM_BLOCK_COUNT; + break; + } default: break; } @@ -1720,6 +1801,7 @@ VkResult radv_CreateDevice( * from the descriptor set anymore, so we have to use a global BO list. */ device->use_global_bo_list = + (device->instance->perftest_flags & RADV_PERFTEST_BO_LIST) || device->enabled_extensions.EXT_descriptor_indexing || device->enabled_extensions.EXT_buffer_device_address; @@ -2955,7 +3037,6 @@ VkResult radv_QueueSubmit( if (result != VK_SUCCESS) return result; } - fence->submitted = true; } return VK_SUCCESS; @@ -3051,6 +3132,23 @@ VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetInstanceProcAddr( return radv_GetInstanceProcAddr(instance, pName); } +PUBLIC +VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetPhysicalDeviceProcAddr( + VkInstance _instance, + const char* pName); + +PUBLIC +VKAPI_ATTR PFN_vkVoidFunction VKAPI_CALL vk_icdGetPhysicalDeviceProcAddr( + VkInstance _instance, + const char* pName) +{ + RADV_FROM_HANDLE(radv_instance, instance, _instance); + + return radv_lookup_physical_device_entrypoint_checked(pName, + instance ? instance->apiVersion : 0, + instance ? &instance->enabled_extensions : NULL); +} + PFN_vkVoidFunction radv_GetDeviceProcAddr( VkDevice _device, const char* pName) @@ -3178,8 +3276,12 @@ static VkResult radv_alloc_memory(struct radv_device *device, if (mem_type_index == RADV_MEM_TYPE_GTT_WRITE_COMBINE) flags |= RADEON_FLAG_GTT_WC; - if (!dedicate_info && !import_info && (!export_info || !export_info->handleTypes)) + if (!dedicate_info && !import_info && (!export_info || !export_info->handleTypes)) { flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING; + if (device->use_global_bo_list) { + flags |= RADEON_FLAG_PREFER_LOCAL_BO; + } + } mem->bo = device->ws->buffer_create(device->ws, alloc_size, device->physical_device->rad_info.max_alignment, domain, flags, priority); @@ -3559,8 +3661,6 @@ radv_sparse_image_opaque_bind_memory(struct radv_device *device, } fence_emitted = true; - if (fence) - fence->submitted = true; } radv_free_sem_info(&sem_info); @@ -3573,7 +3673,6 @@ radv_sparse_image_opaque_bind_memory(struct radv_device *device, if (result != VK_SUCCESS) return result; } - fence->submitted = true; } return VK_SUCCESS; @@ -3599,8 +3698,6 @@ VkResult radv_CreateFence( return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY); fence->fence_wsi = NULL; - fence->submitted = false; - fence->signalled = !!(pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT); fence->temp_syncobj = 0; if (device->always_use_syncobj || handleTypes) { int ret = device->ws->create_syncobj(device->ws, &fence->syncobj); @@ -3619,6 +3716,8 @@ VkResult radv_CreateFence( return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY); } fence->syncobj = 0; + if (pCreateInfo->flags & VK_FENCE_CREATE_SIGNALED_BIT) + device->ws->signal_fence(fence->fence); } *pFence = radv_fence_to_handle(fence); @@ -3666,13 +3765,14 @@ static uint64_t radv_get_absolute_timeout(uint64_t timeout) } -static bool radv_all_fences_plain_and_submitted(uint32_t fenceCount, const VkFence *pFences) +static bool radv_all_fences_plain_and_submitted(struct radv_device *device, + uint32_t fenceCount, const VkFence *pFences) { for (uint32_t i = 0; i < fenceCount; ++i) { RADV_FROM_HANDLE(radv_fence, fence, pFences[i]); if (fence->fence == NULL || fence->syncobj || - fence->temp_syncobj || - (!fence->signalled && !fence->submitted)) + fence->temp_syncobj || fence->fence_wsi || + (!device->ws->is_fence_waitable(fence->fence))) return false; } return true; @@ -3718,7 +3818,7 @@ VkResult radv_WaitForFences( if (!waitAll && fenceCount > 1) { /* Not doing this by default for waitAll, due to needing to allocate twice. */ - if (device->physical_device->rad_info.drm_minor >= 10 && radv_all_fences_plain_and_submitted(fenceCount, pFences)) { + if (device->physical_device->rad_info.drm_minor >= 10 && radv_all_fences_plain_and_submitted(device, fenceCount, pFences)) { uint32_t wait_count = 0; struct radeon_winsys_fence **fences = malloc(sizeof(struct radeon_winsys_fence *) * fenceCount); if (!fences) @@ -3727,7 +3827,7 @@ VkResult radv_WaitForFences( for (uint32_t i = 0; i < fenceCount; ++i) { RADV_FROM_HANDLE(radv_fence, fence, pFences[i]); - if (fence->signalled) { + if (device->ws->fence_wait(device->ws, fence->fence, false, 0)) { free(fences); return VK_SUCCESS; } @@ -3767,23 +3867,11 @@ VkResult radv_WaitForFences( continue; } - if (fence->signalled) - continue; - if (fence->fence) { - if (!fence->submitted) { - while(radv_get_current_time() <= timeout && - !fence->submitted) + if (!device->ws->is_fence_waitable(fence->fence)) { + while(!device->ws->is_fence_waitable(fence->fence) && + radv_get_current_time() <= timeout) /* Do nothing */; - - if (!fence->submitted) - return VK_TIMEOUT; - - /* Recheck as it may have been set by - * submitting operations. */ - - if (fence->signalled) - continue; } expired = device->ws->fence_wait(device->ws, @@ -3798,8 +3886,6 @@ VkResult radv_WaitForFences( if (result != VK_SUCCESS) return result; } - - fence->signalled = true; } return VK_SUCCESS; @@ -3813,7 +3899,8 @@ VkResult radv_ResetFences(VkDevice _device, for (unsigned i = 0; i < fenceCount; ++i) { RADV_FROM_HANDLE(radv_fence, fence, pFences[i]); - fence->submitted = fence->signalled = false; + if (fence->fence) + device->ws->reset_fence(fence->fence); /* Per spec, we first restore the permanent payload, and then reset, so * having a temp syncobj should not skip resetting the permanent syncobj. */ @@ -3845,10 +3932,6 @@ VkResult radv_GetFenceStatus(VkDevice _device, VkFence _fence) return success ? VK_SUCCESS : VK_NOT_READY; } - if (fence->signalled) - return VK_SUCCESS; - if (!fence->submitted) - return VK_NOT_READY; if (fence->fence) { if (!device->ws->fence_wait(device->ws, fence->fence, false, 0)) return VK_NOT_READY; @@ -4069,12 +4152,12 @@ VkDeviceAddress radv_GetBufferDeviceAddressEXT( static inline unsigned -si_tile_mode_index(const struct radv_image *image, unsigned level, bool stencil) +si_tile_mode_index(const struct radv_image_plane *plane, unsigned level, bool stencil) { if (stencil) - return image->surface.u.legacy.stencil_tiling_index[level]; + return plane->surface.u.legacy.stencil_tiling_index[level]; else - return image->surface.u.legacy.tiling_index[level]; + return plane->surface.u.legacy.tiling_index[level]; } static uint32_t radv_surface_max_layer_count(struct radv_image_view *iview) @@ -4095,9 +4178,9 @@ radv_init_dcc_control_reg(struct radv_device *device, return 0; if (iview->image->info.samples > 1) { - if (iview->image->surface.bpe == 1) + if (iview->image->planes[0].surface.bpe == 1) max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B; - else if (iview->image->surface.bpe == 2) + else if (iview->image->planes[0].surface.bpe == 2) max_uncompressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B; } @@ -4142,7 +4225,8 @@ radv_initialise_color_surface(struct radv_device *device, unsigned ntype, format, swap, endian; unsigned blend_clamp = 0, blend_bypass = 0; uint64_t va; - const struct radeon_surf *surf = &iview->image->surface; + const struct radv_image_plane *plane = &iview->image->planes[iview->plane_id]; + const struct radeon_surf *surf = &plane->surface; desc = vk_format_description(iview->vk_format); @@ -4151,35 +4235,37 @@ radv_initialise_color_surface(struct radv_device *device, /* Intensity is implemented as Red, so treat it that way. */ cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1(desc->swizzle[3] == VK_SWIZZLE_1); - va = radv_buffer_get_va(iview->bo) + iview->image->offset; + va = radv_buffer_get_va(iview->bo) + iview->image->offset + plane->offset; cb->cb_color_base = va >> 8; if (device->physical_device->rad_info.chip_class >= GFX9) { struct gfx9_surf_meta_flags meta; if (iview->image->dcc_offset) - meta = iview->image->surface.u.gfx9.dcc; + meta = surf->u.gfx9.dcc; else - meta = iview->image->surface.u.gfx9.cmask; + meta = surf->u.gfx9.cmask; - cb->cb_color_attrib |= S_028C74_COLOR_SW_MODE(iview->image->surface.u.gfx9.surf.swizzle_mode) | - S_028C74_FMASK_SW_MODE(iview->image->surface.u.gfx9.fmask.swizzle_mode) | + cb->cb_color_attrib |= S_028C74_COLOR_SW_MODE(surf->u.gfx9.surf.swizzle_mode) | + S_028C74_FMASK_SW_MODE(surf->u.gfx9.fmask.swizzle_mode) | S_028C74_RB_ALIGNED(meta.rb_aligned) | S_028C74_PIPE_ALIGNED(meta.pipe_aligned); - cb->cb_color_base += iview->image->surface.u.gfx9.surf_offset >> 8; - cb->cb_color_base |= iview->image->surface.tile_swizzle; + cb->cb_color_base += surf->u.gfx9.surf_offset >> 8; + cb->cb_color_base |= surf->tile_swizzle; + + cb->cb_mrt_epitch = S_0287A0_EPITCH(surf->u.gfx9.surf.epitch); } else { const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->base_mip]; unsigned pitch_tile_max, slice_tile_max, tile_mode_index; cb->cb_color_base += level_info->offset >> 8; if (level_info->mode == RADEON_SURF_MODE_2D) - cb->cb_color_base |= iview->image->surface.tile_swizzle; + cb->cb_color_base |= surf->tile_swizzle; pitch_tile_max = level_info->nblk_x / 8 - 1; slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1; - tile_mode_index = si_tile_mode_index(iview->image, iview->base_mip, false); + tile_mode_index = si_tile_mode_index(plane, iview->base_mip, false); cb->cb_color_pitch = S_028C64_TILE_MAX(pitch_tile_max); cb->cb_color_slice = S_028C68_TILE_MAX(slice_tile_max); @@ -4209,7 +4295,7 @@ radv_initialise_color_surface(struct radv_device *device, va = radv_buffer_get_va(iview->bo) + iview->image->offset; va += iview->image->dcc_offset; cb->cb_dcc_base = va >> 8; - cb->cb_dcc_base |= iview->image->surface.tile_swizzle; + cb->cb_dcc_base |= surf->tile_swizzle; uint32_t max_slice = radv_surface_max_layer_count(iview) - 1; cb->cb_color_view = S_028C6C_SLICE_START(iview->base_layer) | @@ -4292,19 +4378,23 @@ radv_initialise_color_surface(struct radv_device *device, /* This must be set for fast clear to work without FMASK. */ if (!radv_image_has_fmask(iview->image) && device->physical_device->rad_info.chip_class == SI) { - unsigned bankh = util_logbase2(iview->image->surface.u.legacy.bankh); + unsigned bankh = util_logbase2(surf->u.legacy.bankh); cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(bankh); } if (device->physical_device->rad_info.chip_class >= GFX9) { + const struct vk_format_description *format_desc = vk_format_description(iview->image->vk_format); + unsigned mip0_depth = iview->image->type == VK_IMAGE_TYPE_3D ? (iview->extent.depth - 1) : (iview->image->info.array_size - 1); + unsigned width = iview->extent.width / (iview->plane_id ? format_desc->width_divisor : 1); + unsigned height = iview->extent.height / (iview->plane_id ? format_desc->height_divisor : 1); cb->cb_color_view |= S_028C6C_MIP_LEVEL(iview->base_mip); cb->cb_color_attrib |= S_028C74_MIP0_DEPTH(mip0_depth) | - S_028C74_RESOURCE_TYPE(iview->image->surface.u.gfx9.resource_type); - cb->cb_color_attrib2 = S_028C68_MIP0_WIDTH(iview->extent.width - 1) | - S_028C68_MIP0_HEIGHT(iview->extent.height - 1) | + S_028C74_RESOURCE_TYPE(surf->u.gfx9.resource_type); + cb->cb_color_attrib2 = S_028C68_MIP0_WIDTH(width - 1) | + S_028C68_MIP0_HEIGHT(height - 1) | S_028C68_MAX_MIP(iview->image->info.levels - 1); } } @@ -4357,6 +4447,11 @@ radv_initialise_ds_surface(struct radv_device *device, unsigned format, stencil_format; uint64_t va, s_offs, z_offs; bool stencil_only = false; + const struct radv_image_plane *plane = &iview->image->planes[0]; + const struct radeon_surf *surf = &plane->surface; + + assert(vk_format_get_plane_count(iview->image->vk_format) == 1); + memset(ds, 0, sizeof(*ds)); switch (iview->image->vk_format) { case VK_FORMAT_D24_UNORM_S8_UINT: @@ -4383,7 +4478,7 @@ radv_initialise_ds_surface(struct radv_device *device, } format = radv_translate_dbformat(iview->image->vk_format); - stencil_format = iview->image->surface.has_stencil ? + stencil_format = surf->has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID; uint32_t max_slice = radv_surface_max_layer_count(iview) - 1; @@ -4397,19 +4492,19 @@ radv_initialise_ds_surface(struct radv_device *device, s_offs = z_offs = va; if (device->physical_device->rad_info.chip_class >= GFX9) { - assert(iview->image->surface.u.gfx9.surf_offset == 0); - s_offs += iview->image->surface.u.gfx9.stencil_offset; + assert(surf->u.gfx9.surf_offset == 0); + s_offs += surf->u.gfx9.stencil_offset; ds->db_z_info = S_028038_FORMAT(format) | S_028038_NUM_SAMPLES(util_logbase2(iview->image->info.samples)) | - S_028038_SW_MODE(iview->image->surface.u.gfx9.surf.swizzle_mode) | + S_028038_SW_MODE(surf->u.gfx9.surf.swizzle_mode) | S_028038_MAXMIP(iview->image->info.levels - 1) | S_028038_ZRANGE_PRECISION(1); ds->db_stencil_info = S_02803C_FORMAT(stencil_format) | - S_02803C_SW_MODE(iview->image->surface.u.gfx9.stencil.swizzle_mode); + S_02803C_SW_MODE(surf->u.gfx9.stencil.swizzle_mode); - ds->db_z_info2 = S_028068_EPITCH(iview->image->surface.u.gfx9.surf.epitch); - ds->db_stencil_info2 = S_02806C_EPITCH(iview->image->surface.u.gfx9.stencil.epitch); + ds->db_z_info2 = S_028068_EPITCH(surf->u.gfx9.surf.epitch); + ds->db_stencil_info2 = S_02806C_EPITCH(surf->u.gfx9.stencil.epitch); ds->db_depth_view |= S_028008_MIPID(level); ds->db_depth_size = S_02801C_X_MAX(iview->image->info.width - 1) | @@ -4427,24 +4522,24 @@ radv_initialise_ds_surface(struct radv_device *device, ds->db_stencil_info |= S_02803C_ITERATE_FLUSH(1); } - if (!iview->image->surface.has_stencil) + if (!surf->has_stencil) /* Use all of the htile_buffer for depth if there's no stencil. */ ds->db_stencil_info |= S_02803C_TILE_STENCIL_DISABLE(1); va = radv_buffer_get_va(iview->bo) + iview->image->offset + iview->image->htile_offset; ds->db_htile_data_base = va >> 8; ds->db_htile_surface = S_028ABC_FULL_CACHE(1) | - S_028ABC_PIPE_ALIGNED(iview->image->surface.u.gfx9.htile.pipe_aligned) | - S_028ABC_RB_ALIGNED(iview->image->surface.u.gfx9.htile.rb_aligned); + S_028ABC_PIPE_ALIGNED(surf->u.gfx9.htile.pipe_aligned) | + S_028ABC_RB_ALIGNED(surf->u.gfx9.htile.rb_aligned); } } else { - const struct legacy_surf_level *level_info = &iview->image->surface.u.legacy.level[level]; + const struct legacy_surf_level *level_info = &surf->u.legacy.level[level]; if (stencil_only) - level_info = &iview->image->surface.u.legacy.stencil_level[level]; + level_info = &surf->u.legacy.stencil_level[level]; - z_offs += iview->image->surface.u.legacy.level[level].offset; - s_offs += iview->image->surface.u.legacy.stencil_level[level].offset; + z_offs += surf->u.legacy.level[level].offset; + s_offs += surf->u.legacy.stencil_level[level].offset; ds->db_depth_info = S_02803C_ADDR5_SWIZZLE_MASK(!radv_image_is_tc_compat_htile(iview->image)); ds->db_z_info = S_028040_FORMAT(format) | S_028040_ZRANGE_PRECISION(1); @@ -4455,9 +4550,9 @@ radv_initialise_ds_surface(struct radv_device *device, if (device->physical_device->rad_info.chip_class >= CIK) { struct radeon_info *info = &device->physical_device->rad_info; - unsigned tiling_index = iview->image->surface.u.legacy.tiling_index[level]; - unsigned stencil_index = iview->image->surface.u.legacy.stencil_tiling_index[level]; - unsigned macro_index = iview->image->surface.u.legacy.macro_tile_index; + unsigned tiling_index = surf->u.legacy.tiling_index[level]; + unsigned stencil_index = surf->u.legacy.stencil_tiling_index[level]; + unsigned macro_index = surf->u.legacy.macro_tile_index; unsigned tile_mode = info->si_tile_mode_array[tiling_index]; unsigned stencil_tile_mode = info->si_tile_mode_array[stencil_index]; unsigned macro_mode = info->cik_macrotile_mode_array[macro_index]; @@ -4475,9 +4570,9 @@ radv_initialise_ds_surface(struct radv_device *device, ds->db_z_info |= S_028040_TILE_SPLIT(G_009910_TILE_SPLIT(tile_mode)); ds->db_stencil_info |= S_028044_TILE_SPLIT(G_009910_TILE_SPLIT(stencil_tile_mode)); } else { - unsigned tile_mode_index = si_tile_mode_index(iview->image, level, false); + unsigned tile_mode_index = si_tile_mode_index(&iview->image->planes[0], level, false); ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index); - tile_mode_index = si_tile_mode_index(iview->image, level, true); + tile_mode_index = si_tile_mode_index(&iview->image->planes[0], level, true); ds->db_stencil_info |= S_028044_TILE_MODE_INDEX(tile_mode_index); if (stencil_only) ds->db_z_info |= S_028040_TILE_MODE_INDEX(tile_mode_index); @@ -4490,7 +4585,7 @@ radv_initialise_ds_surface(struct radv_device *device, if (radv_htile_enabled(iview->image, level)) { ds->db_z_info |= S_028040_TILE_SURFACE_ENABLE(1); - if (!iview->image->surface.has_stencil && + if (!surf->has_stencil && !radv_image_is_tc_compat_htile(iview->image)) /* Use all of the htile_buffer for depth if there's no stencil. */ ds->db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1); @@ -4540,10 +4635,10 @@ VkResult radv_CreateFramebuffer( VkImageView _iview = pCreateInfo->pAttachments[i]; struct radv_image_view *iview = radv_image_view_from_handle(_iview); framebuffer->attachments[i].attachment = iview; - if (iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT) { - radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview); - } else if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { + if (iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT)) { radv_initialise_ds_surface(device, &framebuffer->attachments[i].ds, iview); + } else { + radv_initialise_color_surface(device, &framebuffer->attachments[i].cb, iview); } framebuffer->width = MIN2(framebuffer->width, iview->extent.width); framebuffer->height = MIN2(framebuffer->height, iview->extent.height); @@ -4756,6 +4851,10 @@ VkResult radv_CreateSampler( RADV_FROM_HANDLE(radv_device, device, _device); struct radv_sampler *sampler; + const struct VkSamplerYcbcrConversionInfo *ycbcr_conversion = + vk_find_struct_const(pCreateInfo->pNext, + SAMPLER_YCBCR_CONVERSION_INFO); + assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO); sampler = vk_alloc2(&device->alloc, pAllocator, sizeof(*sampler), 8, @@ -4764,6 +4863,8 @@ VkResult radv_CreateSampler( return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY); radv_init_sampler(device, sampler, pCreateInfo); + + sampler->ycbcr_sampler = ycbcr_conversion ? radv_sampler_ycbcr_conversion_from_handle(ycbcr_conversion->conversion): NULL; *pSampler = radv_sampler_to_handle(sampler); return VK_SUCCESS; @@ -4822,7 +4923,7 @@ vk_icdNegotiateLoaderICDInterfaceVersion(uint32_t *pSupportedVersion) * vkDestroySurfaceKHR(), and other API which uses VKSurfaceKHR, * because the loader no longer does so. */ - *pSupportedVersion = MIN2(*pSupportedVersion, 3u); + *pSupportedVersion = MIN2(*pSupportedVersion, 4u); return VK_SUCCESS; }