X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fvulkan%2Fradv_meta.c;h=ec4fc4a6d4bf03fa248edda20496a421ecdbb95d;hb=d7501834cd86f9ec0b7c3dea17448dc523e36390;hp=647742273c1e22f231bc6c9a147bcc108f1496b7;hpb=ba3dc3519d6b6fa45772bb70351b29dc0e8d5f12;p=mesa.git diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index 647742273c1..ec4fc4a6d4b 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@ -34,9 +34,21 @@ void radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer, uint32_t flags) { + VkPipelineBindPoint bind_point = + flags & RADV_META_SAVE_GRAPHICS_PIPELINE ? + VK_PIPELINE_BIND_POINT_GRAPHICS : + VK_PIPELINE_BIND_POINT_COMPUTE; + struct radv_descriptor_state *descriptors_state = + radv_get_descriptors_state(cmd_buffer, bind_point); + + assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE | + RADV_META_SAVE_COMPUTE_PIPELINE)); + state->flags = flags; if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) { + assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE)); + state->old_pipeline = cmd_buffer->state.pipeline; /* Save all viewports. */ @@ -61,8 +73,16 @@ radv_meta_save(struct radv_meta_saved_state *state, 1 << VK_DYNAMIC_STATE_SCISSOR; } + if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) { + assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE)); + + state->old_pipeline = cmd_buffer->state.compute_pipeline; + } + if (state->flags & RADV_META_SAVE_DESCRIPTORS) { - state->old_descriptor_set0 = cmd_buffer->state.descriptors[0]; + state->old_descriptor_set0 = descriptors_state->sets[0]; + if (!state->old_descriptor_set0) + state->flags &= ~RADV_META_SAVE_DESCRIPTORS; } if (state->flags & RADV_META_SAVE_CONSTANTS) { @@ -83,6 +103,11 @@ void radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer) { + VkPipelineBindPoint bind_point = + state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ? + VK_PIPELINE_BIND_POINT_GRAPHICS : + VK_PIPELINE_BIND_POINT_COMPUTE; + if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) { radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_GRAPHICS, @@ -106,16 +131,25 @@ radv_meta_restore(const struct radv_meta_saved_state *state, 1 << VK_DYNAMIC_STATE_SCISSOR; } + if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) { + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, + radv_pipeline_to_handle(state->old_pipeline)); + } + if (state->flags & RADV_META_SAVE_DESCRIPTORS) { - cmd_buffer->state.descriptors[0] = state->old_descriptor_set0; - cmd_buffer->state.descriptors_dirty |= (1 << 0); + radv_set_descriptor_set(cmd_buffer, bind_point, + state->old_descriptor_set0, 0); } if (state->flags & RADV_META_SAVE_CONSTANTS) { memcpy(cmd_buffer->push_constants, state->push_constants, MAX_PUSH_CONSTANTS_SIZE); - cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS | - VK_SHADER_STAGE_COMPUTE_BIT; + cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT; + + if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) { + cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS; + } } if (state->flags & RADV_META_SAVE_PASS) { @@ -125,38 +159,7 @@ radv_meta_restore(const struct radv_meta_saved_state *state, cmd_buffer->state.attachments = state->attachments; cmd_buffer->state.render_area = state->render_area; if (state->subpass) - radv_emit_framebuffer_state(cmd_buffer); - } -} - -void -radv_meta_save_compute(struct radv_meta_saved_compute_state *state, - const struct radv_cmd_buffer *cmd_buffer, - unsigned push_constant_size) -{ - state->old_pipeline = cmd_buffer->state.compute_pipeline; - state->old_descriptor_set0 = cmd_buffer->state.descriptors[0]; - state->push_constant_size = push_constant_size; - - if (state->push_constant_size) { - memcpy(state->push_constants, cmd_buffer->push_constants, - state->push_constant_size); - } -} - -void -radv_meta_restore_compute(const struct radv_meta_saved_compute_state *state, - struct radv_cmd_buffer *cmd_buffer) -{ - radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE, - radv_pipeline_to_handle(state->old_pipeline)); - - cmd_buffer->state.descriptors[0] = state->old_descriptor_set0; - - if (state->push_constant_size) { - memcpy(cmd_buffer->push_constants, state->push_constants, - state->push_constant_size); - cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT; + cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER; } } @@ -231,15 +234,12 @@ radv_builtin_cache_path(char *path) const char *suffix2 = "/.cache/radv_builtin_shaders"; struct passwd pwd, *result; char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */ + int ret; if (xdg_cache_home) { - - if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX) - return false; - - strcpy(path, xdg_cache_home); - strcat(path, suffix); - return true; + ret = snprintf(path, PATH_MAX + 1, "%s%s%zd", + xdg_cache_home, suffix, sizeof(void *) * 8); + return ret > 0 && ret < PATH_MAX + 1; } getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result); @@ -250,23 +250,25 @@ radv_builtin_cache_path(char *path) strcat(path, "/.cache"); mkdir(path, 0755); - strcat(path, suffix); - return true; + ret = snprintf(path, PATH_MAX + 1, "%s%s%zd", + pwd.pw_dir, suffix2, sizeof(void *) * 8); + return ret > 0 && ret < PATH_MAX + 1; } -static void +static bool radv_load_meta_pipeline(struct radv_device *device) { char path[PATH_MAX + 1]; struct stat st; void *data = NULL; + bool ret = false; if (!radv_builtin_cache_path(path)) - return; + return false; int fd = open(path, O_RDONLY); if (fd < 0) - return; + return false; if (fstat(fd, &st)) goto fail; data = malloc(st.st_size); @@ -275,10 +277,11 @@ radv_load_meta_pipeline(struct radv_device *device) if(read(fd, data, st.st_size) == -1) goto fail; - radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size); + ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size); fail: free(data); close(fd); + return ret; } static void @@ -327,6 +330,8 @@ radv_device_init_meta(struct radv_device *device) { VkResult result; + memset(&device->meta_state, 0, sizeof(device->meta_state)); + device->meta_state.alloc = (VkAllocationCallbacks) { .pUserData = device, .pfnAllocation = meta_alloc, @@ -336,21 +341,24 @@ radv_device_init_meta(struct radv_device *device) device->meta_state.cache.alloc = device->meta_state.alloc; radv_pipeline_cache_init(&device->meta_state.cache, device); - radv_load_meta_pipeline(device); + bool loaded_cache = radv_load_meta_pipeline(device); + bool on_demand = !loaded_cache; + + mtx_init(&device->meta_state.mtx, mtx_plain); - result = radv_device_init_meta_clear_state(device); + result = radv_device_init_meta_clear_state(device, on_demand); if (result != VK_SUCCESS) goto fail_clear; - result = radv_device_init_meta_resolve_state(device); + result = radv_device_init_meta_resolve_state(device, on_demand); if (result != VK_SUCCESS) goto fail_resolve; - result = radv_device_init_meta_blit_state(device); + result = radv_device_init_meta_blit_state(device, on_demand); if (result != VK_SUCCESS) goto fail_blit; - result = radv_device_init_meta_blit2d_state(device); + result = radv_device_init_meta_blit2d_state(device, on_demand); if (result != VK_SUCCESS) goto fail_blit2d; @@ -358,7 +366,7 @@ radv_device_init_meta(struct radv_device *device) if (result != VK_SUCCESS) goto fail_bufimage; - result = radv_device_init_meta_depth_decomp_state(device); + result = radv_device_init_meta_depth_decomp_state(device, on_demand); if (result != VK_SUCCESS) goto fail_depth_decomp; @@ -366,31 +374,38 @@ radv_device_init_meta(struct radv_device *device) if (result != VK_SUCCESS) goto fail_buffer; - result = radv_device_init_meta_query_state(device); + result = radv_device_init_meta_query_state(device, on_demand); if (result != VK_SUCCESS) goto fail_query; - result = radv_device_init_meta_fast_clear_flush_state(device); + result = radv_device_init_meta_fast_clear_flush_state(device, on_demand); if (result != VK_SUCCESS) goto fail_fast_clear; - result = radv_device_init_meta_resolve_compute_state(device); + result = radv_device_init_meta_resolve_compute_state(device, on_demand); if (result != VK_SUCCESS) goto fail_resolve_compute; - result = radv_device_init_meta_resolve_fragment_state(device); + result = radv_device_init_meta_resolve_fragment_state(device, on_demand); if (result != VK_SUCCESS) goto fail_resolve_fragment; + + result = radv_device_init_meta_fmask_expand_state(device); + if (result != VK_SUCCESS) + goto fail_fmask_expand; + return VK_SUCCESS; +fail_fmask_expand: + radv_device_finish_meta_resolve_fragment_state(device); fail_resolve_fragment: radv_device_finish_meta_resolve_compute_state(device); fail_resolve_compute: radv_device_finish_meta_fast_clear_flush_state(device); fail_fast_clear: - radv_device_finish_meta_buffer_state(device); -fail_query: radv_device_finish_meta_query_state(device); +fail_query: + radv_device_finish_meta_buffer_state(device); fail_buffer: radv_device_finish_meta_depth_decomp_state(device); fail_depth_decomp: @@ -404,6 +419,7 @@ fail_blit: fail_resolve: radv_device_finish_meta_clear_state(device); fail_clear: + mtx_destroy(&device->meta_state.mtx); radv_pipeline_cache_finish(&device->meta_state.cache); return result; } @@ -422,9 +438,11 @@ radv_device_finish_meta(struct radv_device *device) radv_device_finish_meta_fast_clear_flush_state(device); radv_device_finish_meta_resolve_compute_state(device); radv_device_finish_meta_resolve_fragment_state(device); + radv_device_finish_meta_fmask_expand_state(device); radv_store_meta_pipeline(device); radv_pipeline_cache_finish(&device->meta_state.cache); + mtx_destroy(&device->meta_state.mtx); } nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2) @@ -511,18 +529,20 @@ void radv_meta_build_resolve_shader_core(nir_builder *b, nir_ssa_def *tmp; nir_if *outer_if = NULL; - nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2); + nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa; + + nir_tex_instr *tex = nir_tex_instr_create(b->shader, 3); tex->sampler_dim = GLSL_SAMPLER_DIM_MS; tex->op = nir_texop_txf_ms; tex->src[0].src_type = nir_tex_src_coord; tex->src[0].src = nir_src_for_ssa(img_coord); tex->src[1].src_type = nir_tex_src_ms_index; tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0)); + tex->src[2].src_type = nir_tex_src_texture_deref; + tex->src[2].src = nir_src_for_ssa(input_img_deref); tex->dest_type = nir_type_float; tex->is_array = false; tex->coord_components = 2; - tex->texture = nir_deref_var_create(tex, input_img); - tex->sampler = NULL; nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); nir_builder_instr_insert(b, &tex->instr); @@ -530,39 +550,39 @@ void radv_meta_build_resolve_shader_core(nir_builder *b, tmp = &tex->dest.ssa; if (!is_integer && samples > 1) { - nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 1); + nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2); tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS; tex_all_same->op = nir_texop_samples_identical; tex_all_same->src[0].src_type = nir_tex_src_coord; tex_all_same->src[0].src = nir_src_for_ssa(img_coord); + tex_all_same->src[1].src_type = nir_tex_src_texture_deref; + tex_all_same->src[1].src = nir_src_for_ssa(input_img_deref); tex_all_same->dest_type = nir_type_float; tex_all_same->is_array = false; tex_all_same->coord_components = 2; - tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img); - tex_all_same->sampler = NULL; nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex"); nir_builder_instr_insert(b, &tex_all_same->instr); - nir_ssa_def *all_same = nir_ine(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0)); + nir_ssa_def *all_same = nir_ieq(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0)); nir_if *if_stmt = nir_if_create(b->shader); if_stmt->condition = nir_src_for_ssa(all_same); nir_cf_node_insert(b->cursor, &if_stmt->cf_node); b->cursor = nir_after_cf_list(&if_stmt->then_list); for (int i = 1; i < samples; i++) { - nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 2); + nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3); tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS; tex_add->op = nir_texop_txf_ms; tex_add->src[0].src_type = nir_tex_src_coord; tex_add->src[0].src = nir_src_for_ssa(img_coord); tex_add->src[1].src_type = nir_tex_src_ms_index; tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i)); + tex_add->src[2].src_type = nir_tex_src_texture_deref; + tex_add->src[2].src = nir_src_for_ssa(input_img_deref); tex_add->dest_type = nir_type_float; tex_add->is_array = false; tex_add->coord_components = 2; - tex_add->texture = nir_deref_var_create(tex_add, input_img); - tex_add->sampler = NULL; nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); nir_builder_instr_insert(b, &tex_add->instr);