X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fvulkan%2Fradv_meta_blit.c;h=3ff48498d80871c16588fe1cf85425818a1e4b48;hb=bd95397d651f89e1f485716b228e18bacbd7d486;hp=cc8ca328cd28fe3c52a0d9fddeeef3b0838dcaa3;hpb=bdd98d950fd7138b4625571964ad0cc76905d4f7;p=mesa.git diff --git a/src/amd/vulkan/radv_meta_blit.c b/src/amd/vulkan/radv_meta_blit.c index cc8ca328cd2..3ff48498d80 100644 --- a/src/amd/vulkan/radv_meta_blit.c +++ b/src/amd/vulkan/radv_meta_blit.c @@ -38,24 +38,64 @@ build_nir_vertex_shader(void) nir_builder b; nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL); - b.shader->info->name = ralloc_strdup(b.shader, "meta_blit_vs"); + b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_vs"); nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "gl_Position"); pos_out->data.location = VARYING_SLOT_POS; - nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, - vec4, "a_tex_pos"); - tex_pos_in->data.location = VERT_ATTRIB_GENERIC0; nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out, vec4, "v_tex_pos"); tex_pos_out->data.location = VARYING_SLOT_VAR0; tex_pos_out->data.interpolation = INTERP_MODE_SMOOTH; - nir_copy_var(&b, tex_pos_out, tex_pos_in); nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b); nir_store_var(&b, pos_out, outvec, 0xf); + + nir_intrinsic_instr *src_box = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src_box->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_base(src_box, 0); + nir_intrinsic_set_range(src_box, 16); + src_box->num_components = 4; + nir_ssa_dest_init(&src_box->instr, &src_box->dest, 4, 32, "src_box"); + nir_builder_instr_insert(&b, &src_box->instr); + + nir_intrinsic_instr *src0_z = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + src0_z->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); + nir_intrinsic_set_base(src0_z, 16); + nir_intrinsic_set_range(src0_z, 4); + src0_z->num_components = 1; + nir_ssa_dest_init(&src0_z->instr, &src0_z->dest, 1, 32, "src0_z"); + nir_builder_instr_insert(&b, &src0_z->instr); + + nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_vertex_id_zero_base); + nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid"); + nir_builder_instr_insert(&b, &vertex_id->instr); + + /* vertex 0 - src0_x, src0_y, src0_z */ + /* vertex 1 - src0_x, src1_y, src0_z*/ + /* vertex 2 - src1_x, src0_y, src0_z */ + /* so channel 0 is vertex_id != 2 ? src_x : src_x + w + channel 1 is vertex id != 1 ? src_y : src_y + w */ + + nir_ssa_def *c0cmp = nir_ine(&b, &vertex_id->dest.ssa, + nir_imm_int(&b, 2)); + nir_ssa_def *c1cmp = nir_ine(&b, &vertex_id->dest.ssa, + nir_imm_int(&b, 1)); + + nir_ssa_def *comp[4]; + comp[0] = nir_bcsel(&b, c0cmp, + nir_channel(&b, &src_box->dest.ssa, 0), + nir_channel(&b, &src_box->dest.ssa, 2)); + + comp[1] = nir_bcsel(&b, c1cmp, + nir_channel(&b, &src_box->dest.ssa, 1), + nir_channel(&b, &src_box->dest.ssa, 3)); + comp[2] = &src0_z->dest.ssa; + comp[3] = nir_imm_float(&b, 1.0); + nir_ssa_def *out_tex_vec = nir_vec(&b, comp, 4); + nir_store_var(&b, tex_pos_out, out_tex_vec, 0xf); return b.shader; } @@ -69,7 +109,7 @@ build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim) nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); sprintf(shader_name, "meta_blit_fs.%d", tex_dim); - b.shader->info->name = ralloc_strdup(b.shader, shader_name); + b.shader->info.name = ralloc_strdup(b.shader, shader_name); nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec4, "v_tex_pos"); @@ -123,7 +163,7 @@ build_nir_copy_fragment_shader_depth(enum glsl_sampler_dim tex_dim) nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); sprintf(shader_name, "meta_blit_depth_fs.%d", tex_dim); - b.shader->info->name = ralloc_strdup(b.shader, shader_name); + b.shader->info.name = ralloc_strdup(b.shader, shader_name); nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec4, "v_tex_pos"); @@ -177,7 +217,7 @@ build_nir_copy_fragment_shader_stencil(enum glsl_sampler_dim tex_dim) nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL); sprintf(shader_name, "meta_blit_stencil_fs.%d", tex_dim); - b.shader->info->name = ralloc_strdup(b.shader, shader_name); + b.shader->info.name = ralloc_strdup(b.shader, shader_name); nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in, vec4, "v_tex_pos"); @@ -225,62 +265,38 @@ static void meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image, struct radv_image_view *src_iview, + VkImageLayout src_image_layout, VkOffset3D src_offset_0, VkOffset3D src_offset_1, struct radv_image *dest_image, struct radv_image_view *dest_iview, - VkOffset3D dest_offset_0, - VkOffset3D dest_offset_1, + VkImageLayout dest_image_layout, + VkOffset2D dest_offset_0, + VkOffset2D dest_offset_1, VkRect2D dest_box, VkFilter blit_filter) { struct radv_device *device = cmd_buffer->device; - unsigned offset = 0; - struct blit_vb_data { - float tex_coord[3]; - } vb_data[3]; - - assert(src_image->samples == dest_image->samples); - unsigned vb_size = 3 * sizeof(*vb_data); - vb_data[0] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_0.x / (float)src_iview->extent.width, - (float)src_offset_0.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, - }; - - vb_data[1] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_0.x / (float)src_iview->extent.width, - (float)src_offset_1.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, + uint32_t src_width = radv_minify(src_iview->image->info.width, src_iview->base_mip); + uint32_t src_height = radv_minify(src_iview->image->info.height, src_iview->base_mip); + uint32_t src_depth = radv_minify(src_iview->image->info.depth, src_iview->base_mip); + uint32_t dst_width = radv_minify(dest_iview->image->info.width, dest_iview->base_mip); + uint32_t dst_height = radv_minify(dest_iview->image->info.height, dest_iview->base_mip); + + assert(src_image->info.samples == dest_image->info.samples); + + float vertex_push_constants[5] = { + (float)src_offset_0.x / (float)src_width, + (float)src_offset_0.y / (float)src_height, + (float)src_offset_1.x / (float)src_width, + (float)src_offset_1.y / (float)src_height, + (float)src_offset_0.z / (float)src_depth, }; - vb_data[2] = (struct blit_vb_data) { - .tex_coord = { - (float)src_offset_1.x / (float)src_iview->extent.width, - (float)src_offset_0.y / (float)src_iview->extent.height, - (float)src_offset_0.z / (float)src_iview->extent.depth, - }, - }; - radv_cmd_buffer_upload_data(cmd_buffer, vb_size, 16, vb_data, &offset); - - struct radv_buffer vertex_buffer = { - .device = device, - .size = vb_size, - .bo = cmd_buffer->upload.upload_bo, - .offset = offset, - }; - - radv_CmdBindVertexBuffers(radv_cmd_buffer_to_handle(cmd_buffer), 0, 1, - (VkBuffer[]) { - radv_buffer_to_handle(&vertex_buffer) - }, - (VkDeviceSize[]) { - 0, - }); + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.blit.pipeline_layout, + VK_SHADER_STAGE_VERTEX_BIT, 0, 20, + vertex_push_constants); VkSampler sampler; radv_CreateSampler(radv_device_to_handle(device), @@ -301,19 +317,20 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, .pAttachments = (VkImageView[]) { radv_image_view_to_handle(dest_iview), }, - .width = dest_iview->extent.width, - .height = dest_iview->extent.height, + .width = dst_width, + .height = dst_height, .layers = 1, }, &cmd_buffer->pool->alloc, &fb); VkPipeline pipeline; switch (src_iview->aspect_mask) { case VK_IMAGE_ASPECT_COLOR_BIT: { unsigned fs_key = radv_format_meta_fs_key(dest_image->vk_format); + unsigned dst_layout = radv_meta_dst_layout_from_layout(dest_image_layout); radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), &(VkRenderPassBeginInfo) { .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit.render_pass[fs_key], + .renderPass = device->meta_state.blit.render_pass[fs_key][dst_layout], .framebuffer = fb, .renderArea = { .offset = { dest_box.offset.x, dest_box.offset.y }, @@ -337,11 +354,12 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, } break; } - case VK_IMAGE_ASPECT_DEPTH_BIT: + case VK_IMAGE_ASPECT_DEPTH_BIT: { + enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout); radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), &(VkRenderPassBeginInfo) { .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit.depth_only_rp, + .renderPass = device->meta_state.blit.depth_only_rp[ds_layout], .framebuffer = fb, .renderArea = { .offset = { dest_box.offset.x, dest_box.offset.y }, @@ -364,11 +382,13 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, unreachable(!"bad VkImageType"); } break; - case VK_IMAGE_ASPECT_STENCIL_BIT: + } + case VK_IMAGE_ASPECT_STENCIL_BIT: { + enum radv_blit_ds_layout ds_layout = radv_meta_blit_ds_to_type(dest_image_layout); radv_CmdBeginRenderPass(radv_cmd_buffer_to_handle(cmd_buffer), &(VkRenderPassBeginInfo) { .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO, - .renderPass = device->meta_state.blit.stencil_only_rp, + .renderPass = device->meta_state.blit.stencil_only_rp[ds_layout], .framebuffer = fb, .renderArea = { .offset = { dest_box.offset.x, dest_box.offset.y }, @@ -391,14 +411,13 @@ meta_emit_blit(struct radv_cmd_buffer *cmd_buffer, unreachable(!"bad VkImageType"); } break; + } default: unreachable(!"bad VkImageType"); } - if (cmd_buffer->state.pipeline != radv_pipeline_from_handle(pipeline)) { - radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); - } + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline); radv_meta_push_descriptor_set(cmd_buffer, VK_PIPELINE_BIND_POINT_GRAPHICS, device->meta_state.blit.pipeline_layout, @@ -495,30 +514,17 @@ void radv_CmdBlitImage( * vkCmdBlitImage must not be used for multisampled source or * destination images. Use vkCmdResolveImage for this purpose. */ - assert(src_image->samples == 1); - assert(dest_image->samples == 1); + assert(src_image->info.samples == 1); + assert(dest_image->info.samples == 1); - radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); + radv_meta_save(&saved_state, cmd_buffer, + RADV_META_SAVE_GRAPHICS_PIPELINE | + RADV_META_SAVE_CONSTANTS | + RADV_META_SAVE_DESCRIPTORS); for (unsigned r = 0; r < regionCount; r++) { const VkImageSubresourceLayers *src_res = &pRegions[r].srcSubresource; const VkImageSubresourceLayers *dst_res = &pRegions[r].dstSubresource; - struct radv_image_view src_iview; - radv_image_view_init(&src_iview, cmd_buffer->device, - &(VkImageViewCreateInfo) { - .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, - .image = srcImage, - .viewType = radv_meta_get_view_type(src_image), - .format = src_image->vk_format, - .subresourceRange = { - .aspectMask = src_res->aspectMask, - .baseMipLevel = src_res->mipLevel, - .levelCount = 1, - .baseArrayLayer = src_res->baseArrayLayer, - .layerCount = 1 - }, - }, - cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); unsigned dst_start, dst_end; if (dest_image->type == VK_IMAGE_TYPE_3D) { @@ -565,24 +571,17 @@ void radv_CmdBlitImage( dest_box.extent.width = abs(dst_x1 - dst_x0); dest_box.extent.height = abs(dst_y1 - dst_y0); - struct radv_image_view dest_iview; - unsigned usage; - if (dst_res->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT) - usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT; - else - usage = VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT; - const unsigned num_layers = dst_end - dst_start; for (unsigned i = 0; i < num_layers; i++) { - const VkOffset3D dest_offset_0 = { + struct radv_image_view dest_iview, src_iview; + + const VkOffset2D dest_offset_0 = { .x = dst_x0, .y = dst_y0, - .z = dst_start + i , }; - const VkOffset3D dest_offset_1 = { + const VkOffset2D dest_offset_1 = { .x = dst_x1, .y = dst_y1, - .z = dst_start + i , }; VkOffset3D src_offset_0 = { .x = src_x0, @@ -594,9 +593,10 @@ void radv_CmdBlitImage( .y = src_y1, .z = src_start + i * src_z_step, }; - const uint32_t dest_array_slice = - radv_meta_get_iview_layer(dest_image, dst_res, - &dest_offset_0); + const uint32_t dest_array_slice = dst_start + i; + + /* 3D images have just 1 layer */ + const uint32_t src_array_slice = src_image->type == VK_IMAGE_TYPE_3D ? 0 : src_start + i; radv_image_view_init(&dest_iview, cmd_buffer->device, &(VkImageViewCreateInfo) { @@ -611,12 +611,25 @@ void radv_CmdBlitImage( .baseArrayLayer = dest_array_slice, .layerCount = 1 }, - }, - cmd_buffer, usage); + }); + radv_image_view_init(&src_iview, cmd_buffer->device, + &(VkImageViewCreateInfo) { + .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, + .image = srcImage, + .viewType = radv_meta_get_view_type(src_image), + .format = src_image->vk_format, + .subresourceRange = { + .aspectMask = src_res->aspectMask, + .baseMipLevel = src_res->mipLevel, + .levelCount = 1, + .baseArrayLayer = src_array_slice, + .layerCount = 1 + }, + }); meta_emit_blit(cmd_buffer, - src_image, &src_iview, + src_image, &src_iview, srcImageLayout, src_offset_0, src_offset_1, - dest_image, &dest_iview, + dest_image, &dest_iview, destImageLayout, dest_offset_0, dest_offset_1, dest_box, filter); @@ -629,71 +642,62 @@ void radv_CmdBlitImage( void radv_device_finish_meta_blit_state(struct radv_device *device) { + struct radv_meta_state *state = &device->meta_state; + for (unsigned i = 0; i < NUM_META_FS_KEYS; ++i) { - if (device->meta_state.blit.render_pass[i]) + for (unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) { radv_DestroyRenderPass(radv_device_to_handle(device), - device->meta_state.blit.render_pass[i], - &device->meta_state.alloc); - if (device->meta_state.blit.pipeline_1d_src[i]) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.pipeline_1d_src[i], - &device->meta_state.alloc); - if (device->meta_state.blit.pipeline_2d_src[i]) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.pipeline_2d_src[i], - &device->meta_state.alloc); - if (device->meta_state.blit.pipeline_3d_src[i]) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.pipeline_3d_src[i], - &device->meta_state.alloc); - } - - if (device->meta_state.blit.depth_only_rp) - radv_DestroyRenderPass(radv_device_to_handle(device), - device->meta_state.blit.depth_only_rp, - &device->meta_state.alloc); - if (device->meta_state.blit.depth_only_1d_pipeline) + state->blit.render_pass[i][j], + &state->alloc); + } radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.depth_only_1d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.depth_only_2d_pipeline) + state->blit.pipeline_1d_src[i], + &state->alloc); radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.depth_only_2d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.depth_only_3d_pipeline) + state->blit.pipeline_2d_src[i], + &state->alloc); radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.depth_only_3d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.stencil_only_rp) + state->blit.pipeline_3d_src[i], + &state->alloc); + } + + for (enum radv_blit_ds_layout i = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; i < RADV_BLIT_DS_LAYOUT_COUNT; i++) { radv_DestroyRenderPass(radv_device_to_handle(device), - device->meta_state.blit.stencil_only_rp, - &device->meta_state.alloc); - if (device->meta_state.blit.stencil_only_1d_pipeline) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.stencil_only_1d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.stencil_only_2d_pipeline) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.stencil_only_2d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.stencil_only_3d_pipeline) - radv_DestroyPipeline(radv_device_to_handle(device), - device->meta_state.blit.stencil_only_3d_pipeline, - &device->meta_state.alloc); - if (device->meta_state.blit.pipeline_layout) - radv_DestroyPipelineLayout(radv_device_to_handle(device), - device->meta_state.blit.pipeline_layout, - &device->meta_state.alloc); - if (device->meta_state.blit.ds_layout) - radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), - device->meta_state.blit.ds_layout, - &device->meta_state.alloc); + state->blit.depth_only_rp[i], &state->alloc); + radv_DestroyRenderPass(radv_device_to_handle(device), + state->blit.stencil_only_rp[i], &state->alloc); + } + + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.depth_only_1d_pipeline, &state->alloc); + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.depth_only_2d_pipeline, &state->alloc); + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.depth_only_3d_pipeline, &state->alloc); + + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.stencil_only_1d_pipeline, + &state->alloc); + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.stencil_only_2d_pipeline, + &state->alloc); + radv_DestroyPipeline(radv_device_to_handle(device), + state->blit.stencil_only_3d_pipeline, + &state->alloc); + + + radv_DestroyPipelineLayout(radv_device_to_handle(device), + state->blit.pipeline_layout, &state->alloc); + radv_DestroyDescriptorSetLayout(radv_device_to_handle(device), + state->blit.ds_layout, &state->alloc); } static VkFormat pipeline_formats[] = { VK_FORMAT_R8G8B8A8_UNORM, VK_FORMAT_R8G8B8A8_UINT, VK_FORMAT_R8G8B8A8_SINT, + VK_FORMAT_A2R10G10B10_UINT_PACK32, + VK_FORMAT_A2R10G10B10_SINT_PACK32, VK_FORMAT_R16G16B16A16_UNORM, VK_FORMAT_R16G16B16A16_SNORM, VK_FORMAT_R16G16B16A16_UINT, @@ -716,59 +720,46 @@ radv_device_init_meta_blit_color(struct radv_device *device, for (unsigned i = 0; i < ARRAY_SIZE(pipeline_formats); ++i) { unsigned key = radv_format_meta_fs_key(pipeline_formats[i]); - result = radv_CreateRenderPass(radv_device_to_handle(device), - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, - .attachmentCount = 1, - .pAttachments = &(VkAttachmentDescription) { - .format = pipeline_formats[i], - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 1, - .pColorAttachments = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, + for(unsigned j = 0; j < RADV_META_DST_LAYOUT_COUNT; ++j) { + VkImageLayout layout = radv_meta_dst_layout_to_layout(j); + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + .attachmentCount = 1, + .pAttachments = &(VkAttachmentDescription) { + .format = pipeline_formats[i], + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = layout, + .finalLayout = layout, }, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = VK_ATTACHMENT_UNUSED, - .layout = VK_IMAGE_LAYOUT_GENERAL, + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 1, + .pColorAttachments = &(VkAttachmentReference) { + .attachment = 0, + .layout = layout, + }, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = VK_ATTACHMENT_UNUSED, + .layout = VK_IMAGE_LAYOUT_GENERAL, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, }, - .preserveAttachmentCount = 1, - .pPreserveAttachments = (uint32_t[]) { 0 }, - }, - .dependencyCount = 0, - }, &device->meta_state.alloc, &device->meta_state.blit.render_pass[key]); - if (result != VK_SUCCESS) - goto fail; + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.render_pass[key][j]); + if (result != VK_SUCCESS) + goto fail; + } VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0 - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -838,7 +829,7 @@ radv_device_init_meta_blit_color(struct radv_device *device, }, .flags = 0, .layout = device->meta_state.blit.pipeline_layout, - .renderPass = device->meta_state.blit.render_pass[key], + .renderPass = device->meta_state.blit.render_pass[key][0], .subpass = 0, }; @@ -891,56 +882,43 @@ radv_device_init_meta_blit_depth(struct radv_device *device, fs_2d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_2D); fs_3d.nir = build_nir_copy_fragment_shader_depth(GLSL_SAMPLER_DIM_3D); - result = radv_CreateRenderPass(radv_device_to_handle(device), - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) { + VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout); + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, .attachmentCount = 1, .pAttachments = &(VkAttachmentDescription) { - .format = 0, - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 0, - .pColorAttachments = NULL, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, + .format = VK_FORMAT_D32_SFLOAT, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = layout, + .finalLayout = layout, }, - .preserveAttachmentCount = 1, - .pPreserveAttachments = (uint32_t[]) { 0 }, - }, - .dependencyCount = 0, - }, &device->meta_state.alloc, &device->meta_state.blit.depth_only_rp); - if (result != VK_SUCCESS) - goto fail; + .subpassCount = 1, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = layout, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, + }, + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.depth_only_rp[ds_layout]); + if (result != VK_SUCCESS) + goto fail; + } VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0, - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -1015,7 +993,7 @@ radv_device_init_meta_blit_depth(struct radv_device *device, }, .flags = 0, .layout = device->meta_state.blit.pipeline_layout, - .renderPass = device->meta_state.blit.depth_only_rp, + .renderPass = device->meta_state.blit.depth_only_rp[0], .subpass = 0, }; @@ -1065,56 +1043,43 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, fs_2d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_2D); fs_3d.nir = build_nir_copy_fragment_shader_stencil(GLSL_SAMPLER_DIM_3D); - result = radv_CreateRenderPass(radv_device_to_handle(device), - &(VkRenderPassCreateInfo) { - .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, + for (enum radv_blit_ds_layout ds_layout = RADV_BLIT_DS_LAYOUT_TILE_ENABLE; ds_layout < RADV_BLIT_DS_LAYOUT_COUNT; ds_layout++) { + VkImageLayout layout = radv_meta_blit_ds_to_layout(ds_layout); + result = radv_CreateRenderPass(radv_device_to_handle(device), + &(VkRenderPassCreateInfo) { + .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO, .attachmentCount = 1, .pAttachments = &(VkAttachmentDescription) { - .format = 0, - .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, - .storeOp = VK_ATTACHMENT_STORE_OP_STORE, - .initialLayout = VK_IMAGE_LAYOUT_GENERAL, - .finalLayout = VK_IMAGE_LAYOUT_GENERAL, - }, + .format = VK_FORMAT_S8_UINT, + .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD, + .storeOp = VK_ATTACHMENT_STORE_OP_STORE, + .initialLayout = layout, + .finalLayout = layout, + }, .subpassCount = 1, - .pSubpasses = &(VkSubpassDescription) { - .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, - .inputAttachmentCount = 0, - .colorAttachmentCount = 0, - .pColorAttachments = NULL, - .pResolveAttachments = NULL, - .pDepthStencilAttachment = &(VkAttachmentReference) { - .attachment = 0, - .layout = VK_IMAGE_LAYOUT_GENERAL, + .pSubpasses = &(VkSubpassDescription) { + .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS, + .inputAttachmentCount = 0, + .colorAttachmentCount = 0, + .pColorAttachments = NULL, + .pResolveAttachments = NULL, + .pDepthStencilAttachment = &(VkAttachmentReference) { + .attachment = 0, + .layout = layout, + }, + .preserveAttachmentCount = 1, + .pPreserveAttachments = (uint32_t[]) { 0 }, }, - .preserveAttachmentCount = 1, - .pPreserveAttachments = (uint32_t[]) { 0 }, - }, - .dependencyCount = 0, - }, &device->meta_state.alloc, &device->meta_state.blit.stencil_only_rp); + .dependencyCount = 0, + }, &device->meta_state.alloc, &device->meta_state.blit.stencil_only_rp[ds_layout]); + } if (result != VK_SUCCESS) goto fail; VkPipelineVertexInputStateCreateInfo vi_create_info = { .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO, - .vertexBindingDescriptionCount = 1, - .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) { - { - .binding = 0, - .stride = 3 * sizeof(float), - .inputRate = VK_VERTEX_INPUT_RATE_VERTEX - }, - }, - .vertexAttributeDescriptionCount = 1, - .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) { - { - /* Texture Coordinate */ - .location = 0, - .binding = 0, - .format = VK_FORMAT_R32G32B32_SFLOAT, - .offset = 0 - } - } + .vertexBindingDescriptionCount = 0, + .vertexAttributeDescriptionCount = 0, }; VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = { @@ -1191,7 +1156,6 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, }, .depthCompareOp = VK_COMPARE_OP_ALWAYS, }, - .pDynamicState = &(VkPipelineDynamicStateCreateInfo) { .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO, .dynamicStateCount = 6, @@ -1206,7 +1170,7 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, }, .flags = 0, .layout = device->meta_state.blit.pipeline_layout, - .renderPass = device->meta_state.blit.stencil_only_rp, + .renderPass = device->meta_state.blit.stencil_only_rp[0], .subpass = 0, }; @@ -1238,6 +1202,7 @@ radv_device_init_meta_blit_stencil(struct radv_device *device, if (result != VK_SUCCESS) goto fail; + fail: ralloc_free(fs_1d.nir); ralloc_free(fs_2d.nir); @@ -1250,7 +1215,6 @@ radv_device_init_meta_blit_state(struct radv_device *device) { VkResult result; struct radv_shader_module vs = {0}; - zero(device->meta_state.blit); VkDescriptorSetLayoutCreateInfo ds_layout_info = { .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO, @@ -1273,11 +1237,15 @@ radv_device_init_meta_blit_state(struct radv_device *device) if (result != VK_SUCCESS) goto fail; + const VkPushConstantRange push_constant_range = {VK_SHADER_STAGE_VERTEX_BIT, 0, 20}; + result = radv_CreatePipelineLayout(radv_device_to_handle(device), &(VkPipelineLayoutCreateInfo) { .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO, .setLayoutCount = 1, .pSetLayouts = &device->meta_state.blit.ds_layout, + .pushConstantRangeCount = 1, + .pPushConstantRanges = &push_constant_range, }, &device->meta_state.alloc, &device->meta_state.blit.pipeline_layout); if (result != VK_SUCCESS) @@ -1294,12 +1262,10 @@ radv_device_init_meta_blit_state(struct radv_device *device) goto fail; result = radv_device_init_meta_blit_stencil(device, &vs); - if (result != VK_SUCCESS) - goto fail; - return VK_SUCCESS; fail: ralloc_free(vs.nir); - radv_device_finish_meta_blit_state(device); + if (result != VK_SUCCESS) + radv_device_finish_meta_blit_state(device); return result; }