X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Famd%2Fvulkan%2Fradv_meta_resolve_cs.c;h=7c569aa92027e55def9af08da71ec48ee5dcddb0;hb=2ce11ac11fee594ca01608c4006b38c0c8ea37ff;hp=99a3a06381cd5f97f0c0b5a44ae100303aaa359c;hpb=588185eb6b76bf31fedbfcbf32fc3b2035b2d541;p=mesa.git diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c index 99a3a06381c..7c569aa9202 100644 --- a/src/amd/vulkan/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/radv_meta_resolve_cs.c @@ -31,12 +31,50 @@ #include "sid.h" #include "vk_format.h" +static nir_ssa_def *radv_meta_build_resolve_srgb_conversion(nir_builder *b, + nir_ssa_def *input) +{ + nir_const_value v; + unsigned i; + v.u32[0] = 0x3b4d2e1c; // 0.00313080009 + + nir_ssa_def *cmp[3]; + for (i = 0; i < 3; i++) + cmp[i] = nir_flt(b, nir_channel(b, input, i), + nir_build_imm(b, 1, 32, v)); + + nir_ssa_def *ltvals[3]; + v.f32[0] = 12.92; + for (i = 0; i < 3; i++) + ltvals[i] = nir_fmul(b, nir_channel(b, input, i), + nir_build_imm(b, 1, 32, v)); + + nir_ssa_def *gtvals[3]; + + for (i = 0; i < 3; i++) { + v.f32[0] = 1.0/2.4; + gtvals[i] = nir_fpow(b, nir_channel(b, input, i), + nir_build_imm(b, 1, 32, v)); + v.f32[0] = 1.055; + gtvals[i] = nir_fmul(b, gtvals[i], + nir_build_imm(b, 1, 32, v)); + v.f32[0] = 0.055; + gtvals[i] = nir_fsub(b, gtvals[i], + nir_build_imm(b, 1, 32, v)); + } + + nir_ssa_def *comp[4]; + for (i = 0; i < 3; i++) + comp[i] = nir_bcsel(b, cmp[i], ltvals[i], gtvals[i]); + comp[3] = nir_channels(b, input, 1 << 3); + return nir_vec(b, comp, 4); +} + static nir_shader * build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_srgb, int samples) { nir_builder b; char name[64]; - nir_if *outer_if = NULL; const struct glsl_type *sampler_type = glsl_sampler_type(GLSL_SAMPLER_DIM_MS, false, false, @@ -47,10 +85,10 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s GLSL_TYPE_FLOAT); snprintf(name, 64, "meta_resolve_cs-%d-%s", samples, is_integer ? "int" : (is_srgb ? "srgb" : "float")); nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_COMPUTE, NULL); - b.shader->info->name = ralloc_strdup(b.shader, name); - b.shader->info->cs.local_size[0] = 16; - b.shader->info->cs.local_size[1] = 16; - b.shader->info->cs.local_size[2] = 1; + b.shader->info.name = ralloc_strdup(b.shader, name); + b.shader->info.cs.local_size[0] = 16; + b.shader->info.cs.local_size[1] = 16; + b.shader->info.cs.local_size[2] = 1; nir_variable *input_img = nir_variable_create(b.shader, nir_var_uniform, sampler_type, "s_tex"); @@ -64,143 +102,43 @@ build_resolve_compute_shader(struct radv_device *dev, bool is_integer, bool is_s nir_ssa_def *invoc_id = nir_load_system_value(&b, nir_intrinsic_load_local_invocation_id, 0); nir_ssa_def *wg_id = nir_load_system_value(&b, nir_intrinsic_load_work_group_id, 0); nir_ssa_def *block_size = nir_imm_ivec4(&b, - b.shader->info->cs.local_size[0], - b.shader->info->cs.local_size[1], - b.shader->info->cs.local_size[2], 0); + b.shader->info.cs.local_size[0], + b.shader->info.cs.local_size[1], + b.shader->info.cs.local_size[2], 0); nir_ssa_def *global_id = nir_iadd(&b, nir_imul(&b, wg_id, block_size), invoc_id); nir_intrinsic_instr *src_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + nir_intrinsic_set_base(src_offset, 0); + nir_intrinsic_set_range(src_offset, 16); src_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 0)); src_offset->num_components = 2; nir_ssa_dest_init(&src_offset->instr, &src_offset->dest, 2, 32, "src_offset"); nir_builder_instr_insert(&b, &src_offset->instr); nir_intrinsic_instr *dst_offset = nir_intrinsic_instr_create(b.shader, nir_intrinsic_load_push_constant); + nir_intrinsic_set_base(dst_offset, 0); + nir_intrinsic_set_range(dst_offset, 16); dst_offset->src[0] = nir_src_for_ssa(nir_imm_int(&b, 8)); dst_offset->num_components = 2; nir_ssa_dest_init(&dst_offset->instr, &dst_offset->dest, 2, 32, "dst_offset"); nir_builder_instr_insert(&b, &dst_offset->instr); nir_ssa_def *img_coord = nir_channels(&b, nir_iadd(&b, global_id, &src_offset->dest.ssa), 0x3); - /* do a txf_ms on each sample */ - nir_ssa_def *tmp; - - nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2); - tex->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex->op = nir_texop_txf_ms; - tex->src[0].src_type = nir_tex_src_coord; - tex->src[0].src = nir_src_for_ssa(img_coord); - tex->src[1].src_type = nir_tex_src_ms_index; - tex->src[1].src = nir_src_for_ssa(nir_imm_int(&b, 0)); - tex->dest_type = nir_type_float; - tex->is_array = false; - tex->coord_components = 2; - tex->texture = nir_deref_var_create(tex, input_img); - tex->sampler = NULL; - - nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex"); - nir_builder_instr_insert(&b, &tex->instr); - - tmp = &tex->dest.ssa; - nir_variable *color = - nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); - - if (!is_integer && samples > 1) { - nir_tex_instr *tex_all_same = nir_tex_instr_create(b.shader, 1); - tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex_all_same->op = nir_texop_samples_identical; - tex_all_same->src[0].src_type = nir_tex_src_coord; - tex_all_same->src[0].src = nir_src_for_ssa(img_coord); - tex_all_same->dest_type = nir_type_float; - tex_all_same->is_array = false; - tex_all_same->coord_components = 2; - tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img); - tex_all_same->sampler = NULL; - - nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex"); - nir_builder_instr_insert(&b, &tex_all_same->instr); - - nir_ssa_def *all_same = nir_ine(&b, &tex_all_same->dest.ssa, nir_imm_int(&b, 0)); - nir_if *if_stmt = nir_if_create(b.shader); - if_stmt->condition = nir_src_for_ssa(all_same); - nir_cf_node_insert(b.cursor, &if_stmt->cf_node); - - b.cursor = nir_after_cf_list(&if_stmt->then_list); - for (int i = 1; i < samples; i++) { - nir_tex_instr *tex_add = nir_tex_instr_create(b.shader, 2); - tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS; - tex_add->op = nir_texop_txf_ms; - tex_add->src[0].src_type = nir_tex_src_coord; - tex_add->src[0].src = nir_src_for_ssa(img_coord); - tex_add->src[1].src_type = nir_tex_src_ms_index; - tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(&b, i)); - tex_add->dest_type = nir_type_float; - tex_add->is_array = false; - tex_add->coord_components = 2; - tex_add->texture = nir_deref_var_create(tex_add, input_img); - tex_add->sampler = NULL; - - nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex"); - nir_builder_instr_insert(&b, &tex_add->instr); - - tmp = nir_fadd(&b, tmp, &tex_add->dest.ssa); - } + nir_variable *color = nir_local_variable_create(b.impl, glsl_vec4_type(), "color"); - tmp = nir_fdiv(&b, tmp, nir_imm_float(&b, samples)); - nir_store_var(&b, color, tmp, 0xf); - b.cursor = nir_after_cf_list(&if_stmt->else_list); - outer_if = if_stmt; - } - nir_store_var(&b, color, &tex->dest.ssa, 0xf); - - if (outer_if) - b.cursor = nir_after_cf_node(&outer_if->cf_node); - - nir_ssa_def *newv = nir_load_var(&b, color); - - if (is_srgb) { - nir_const_value v; - unsigned i; - v.u32[0] = 0x3b4d2e1c; // 0.00313080009 - - nir_ssa_def *cmp[3]; - for (i = 0; i < 3; i++) - cmp[i] = nir_flt(&b, nir_channel(&b, newv, i), - nir_build_imm(&b, 1, 32, v)); - - nir_ssa_def *ltvals[3]; - v.f32[0] = 12.92; - for (i = 0; i < 3; i++) - ltvals[i] = nir_fmul(&b, nir_channel(&b, newv, i), - nir_build_imm(&b, 1, 32, v)); - - nir_ssa_def *gtvals[3]; - - for (i = 0; i < 3; i++) { - v.f32[0] = 1.0/2.4; - gtvals[i] = nir_fpow(&b, nir_channel(&b, newv, i), - nir_build_imm(&b, 1, 32, v)); - v.f32[0] = 1.055; - gtvals[i] = nir_fmul(&b, gtvals[i], - nir_build_imm(&b, 1, 32, v)); - v.f32[0] = 0.055; - gtvals[i] = nir_fsub(&b, gtvals[i], - nir_build_imm(&b, 1, 32, v)); - } + radv_meta_build_resolve_shader_core(&b, is_integer, samples, input_img, + color, img_coord); - nir_ssa_def *comp[4]; - for (i = 0; i < 3; i++) - comp[i] = nir_bcsel(&b, cmp[i], ltvals[i], gtvals[i]); - comp[3] = nir_channels(&b, newv, 3); - newv = nir_vec(&b, comp, 4); - } + nir_ssa_def *outval = nir_load_var(&b, color); + if (is_srgb) + outval = radv_meta_build_resolve_srgb_conversion(&b, outval); nir_ssa_def *coord = nir_iadd(&b, global_id, &dst_offset->dest.ssa); nir_intrinsic_instr *store = nir_intrinsic_instr_create(b.shader, nir_intrinsic_image_store); store->src[0] = nir_src_for_ssa(coord); store->src[1] = nir_src_for_ssa(nir_ssa_undef(&b, 1, 32)); - store->src[2] = nir_src_for_ssa(newv); + store->src[2] = nir_src_for_ssa(outval); store->variables[0] = nir_deref_var_create(store, output_img); nir_builder_instr_insert(&b, &store->instr); return b.shader; @@ -312,7 +250,6 @@ radv_device_init_meta_resolve_compute_state(struct radv_device *device) { struct radv_meta_state *state = &device->meta_state; VkResult res; - memset(&device->meta_state.resolve_compute, 0, sizeof(device->meta_state.resolve_compute)); res = create_layout(device); if (res != VK_SUCCESS) @@ -361,6 +298,77 @@ radv_device_finish_meta_resolve_compute_state(struct radv_device *device) &state->alloc); } +static void +emit_resolve(struct radv_cmd_buffer *cmd_buffer, + struct radv_image_view *src_iview, + struct radv_image_view *dest_iview, + const VkOffset2D *src_offset, + const VkOffset2D *dest_offset, + const VkExtent2D *resolve_extent) +{ + struct radv_device *device = cmd_buffer->device; + const uint32_t samples = src_iview->image->info.samples; + const uint32_t samples_log2 = ffs(samples) - 1; + radv_meta_push_descriptor_set(cmd_buffer, + VK_PIPELINE_BIND_POINT_COMPUTE, + device->meta_state.resolve_compute.p_layout, + 0, /* set */ + 2, /* descriptorWriteCount */ + (VkWriteDescriptorSet[]) { + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstBinding = 0, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(src_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL }, + } + }, + { + .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, + .dstBinding = 1, + .dstArrayElement = 0, + .descriptorCount = 1, + .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, + .pImageInfo = (VkDescriptorImageInfo[]) { + { + .sampler = VK_NULL_HANDLE, + .imageView = radv_image_view_to_handle(dest_iview), + .imageLayout = VK_IMAGE_LAYOUT_GENERAL, + }, + } + } + }); + + VkPipeline pipeline; + if (vk_format_is_int(src_iview->image->vk_format)) + pipeline = device->meta_state.resolve_compute.rc[samples_log2].i_pipeline; + else if (vk_format_is_srgb(src_iview->image->vk_format)) + pipeline = device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline; + else + pipeline = device->meta_state.resolve_compute.rc[samples_log2].pipeline; + + radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), + VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); + + unsigned push_constants[4] = { + src_offset->x, + src_offset->y, + dest_offset->x, + dest_offset->y, + }; + radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), + device->meta_state.resolve_compute.p_layout, + VK_SHADER_STAGE_COMPUTE_BIT, 0, 16, + push_constants); + radv_unaligned_dispatch(cmd_buffer, resolve_extent->width, resolve_extent->height, 1); + +} + void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image, VkImageLayout src_image_layout, @@ -369,10 +377,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, uint32_t region_count, const VkImageResolve *regions) { - struct radv_device *device = cmd_buffer->device; - struct radv_meta_saved_compute_state saved_state; - const uint32_t samples = src_image->info.samples; - const uint32_t samples_log2 = ffs(samples) - 1; + struct radv_meta_saved_state saved_state; for (uint32_t r = 0; r < region_count; ++r) { const VkImageResolve *region = ®ions[r]; @@ -388,7 +393,10 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, radv_fast_clear_flush_image_inplace(cmd_buffer, src_image, &range); } - radv_meta_save_compute(&saved_state, cmd_buffer, 16); + radv_meta_save(&saved_state, cmd_buffer, + RADV_META_SAVE_COMPUTE_PIPELINE | + RADV_META_SAVE_CONSTANTS | + RADV_META_SAVE_DESCRIPTORS); for (uint32_t r = 0; r < region_count; ++r) { const VkImageResolve *region = ®ions[r]; @@ -429,8 +437,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, .baseArrayLayer = src_base_layer + layer, .layerCount = 1, }, - }, - cmd_buffer, VK_IMAGE_USAGE_SAMPLED_BIT); + }); struct radv_image_view dest_iview; radv_image_view_init(&dest_iview, cmd_buffer->device, @@ -438,7 +445,7 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(dest_image), .viewType = radv_meta_get_view_type(dest_image), - .format = dest_image->vk_format, + .format = vk_to_non_srgb_format(dest_image->vk_format), .subresourceRange = { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, .baseMipLevel = region->dstSubresource.mipLevel, @@ -446,70 +453,104 @@ void radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, .baseArrayLayer = dest_base_layer + layer, .layerCount = 1, }, - }, - cmd_buffer, VK_IMAGE_USAGE_STORAGE_BIT); - - - radv_meta_push_descriptor_set(cmd_buffer, - VK_PIPELINE_BIND_POINT_COMPUTE, - device->meta_state.resolve_compute.p_layout, - 0, /* set */ - 2, /* descriptorWriteCount */ - (VkWriteDescriptorSet[]) { - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 0, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]) { - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&src_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - } - }, - { - .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET, - .dstBinding = 1, - .dstArrayElement = 0, - .descriptorCount = 1, - .descriptorType = VK_DESCRIPTOR_TYPE_STORAGE_IMAGE, - .pImageInfo = (VkDescriptorImageInfo[]) { - { - .sampler = VK_NULL_HANDLE, - .imageView = radv_image_view_to_handle(&dest_iview), - .imageLayout = VK_IMAGE_LAYOUT_GENERAL, - }, - } - } - }); - - VkPipeline pipeline; - if (vk_format_is_int(src_image->vk_format)) - pipeline = device->meta_state.resolve_compute.rc[samples_log2].i_pipeline; - else if (vk_format_is_srgb(src_image->vk_format)) - pipeline = device->meta_state.resolve_compute.rc[samples_log2].srgb_pipeline; - else - pipeline = device->meta_state.resolve_compute.rc[samples_log2].pipeline; - if (cmd_buffer->state.compute_pipeline != radv_pipeline_from_handle(pipeline)) { - radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), - VK_PIPELINE_BIND_POINT_COMPUTE, pipeline); - } - - unsigned push_constants[4] = { - srcOffset.x, - srcOffset.y, - dstOffset.x, - dstOffset.y, - }; - radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer), - device->meta_state.resolve_compute.p_layout, - VK_SHADER_STAGE_COMPUTE_BIT, 0, 16, - push_constants); - radv_unaligned_dispatch(cmd_buffer, extent.width, extent.height, 1); + }); + + emit_resolve(cmd_buffer, + &src_iview, + &dest_iview, + &(VkOffset2D) {srcOffset.x, srcOffset.y }, + &(VkOffset2D) {dstOffset.x, dstOffset.y }, + &(VkExtent2D) {extent.width, extent.height }); } } - radv_meta_restore_compute(&saved_state, cmd_buffer, 16); + radv_meta_restore(&saved_state, cmd_buffer); +} + +/** + * Emit any needed resolves for the current subpass. + */ +void +radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer) +{ + struct radv_framebuffer *fb = cmd_buffer->state.framebuffer; + const struct radv_subpass *subpass = cmd_buffer->state.subpass; + struct radv_meta_saved_state saved_state; + /* FINISHME(perf): Skip clears for resolve attachments. + * + * From the Vulkan 1.0 spec: + * + * If the first use of an attachment in a render pass is as a resolve + * attachment, then the loadOp is effectively ignored as the resolve is + * guaranteed to overwrite all pixels in the render area. + */ + + if (!subpass->has_resolve) + return; + + /* Resolves happen before the end-of-subpass barriers get executed, + * so we have to make the attachment shader-readable */ + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH | + RADV_CMD_FLAG_FLUSH_AND_INV_CB | + RADV_CMD_FLAG_FLUSH_AND_INV_CB_META | + RADV_CMD_FLAG_INV_GLOBAL_L2 | + RADV_CMD_FLAG_INV_VMEM_L1; + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + VkAttachmentReference src_att = subpass->color_attachments[i]; + VkAttachmentReference dest_att = subpass->resolve_attachments[i]; + + if (src_att.attachment == VK_ATTACHMENT_UNUSED || + dest_att.attachment == VK_ATTACHMENT_UNUSED) + continue; + + struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image; + struct radv_image_view *src_iview = cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + + assert(!dst_img->surface.dcc_size); + + VkImageSubresourceRange range; + range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT; + range.baseMipLevel = 0; + range.levelCount = 1; + range.baseArrayLayer = 0; + range.layerCount = 1; + radv_fast_clear_flush_image_inplace(cmd_buffer, src_iview->image, &range); + } + + radv_meta_save(&saved_state, cmd_buffer, + RADV_META_SAVE_COMPUTE_PIPELINE | + RADV_META_SAVE_CONSTANTS | + RADV_META_SAVE_DESCRIPTORS); + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + VkAttachmentReference src_att = subpass->color_attachments[i]; + VkAttachmentReference dest_att = subpass->resolve_attachments[i]; + struct radv_image_view *src_iview = cmd_buffer->state.framebuffer->attachments[src_att.attachment].attachment; + struct radv_image_view *dst_iview = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment; + if (dest_att.attachment == VK_ATTACHMENT_UNUSED) + continue; + + emit_resolve(cmd_buffer, + src_iview, + dst_iview, + &(VkOffset2D) { 0, 0 }, + &(VkOffset2D) { 0, 0 }, + &(VkExtent2D) { fb->width, fb->height }); + } + + radv_meta_restore(&saved_state, cmd_buffer); + + for (uint32_t i = 0; i < subpass->color_count; ++i) { + VkAttachmentReference dest_att = subpass->resolve_attachments[i]; + struct radv_image *dst_img = cmd_buffer->state.framebuffer->attachments[dest_att.attachment].attachment->image; + if (dest_att.attachment == VK_ATTACHMENT_UNUSED) + continue; + VkImageSubresourceRange range; + range.aspectMask = VK_IMAGE_ASPECT_COLOR_BIT; + range.baseMipLevel = 0; + range.levelCount = 1; + range.baseArrayLayer = 0; + range.layerCount = 1; + radv_fast_clear_flush_image_inplace(cmd_buffer, dst_img, &range); + } }