X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Farch%2Fmips%2Fisa%2Fbase.isa;h=54647300bbc8725d7218f32c5f431d4e6a455237;hb=4e7fe439d7fe9cefb8cae5e79a1caa7aa4f0b45b;hp=b733da7dab6b08a7818d884cb70180ea3443faba;hpb=3c95f5958fd1a90cf83d85e1b24fb700c07bae91;p=gem5.git

diff --git a/src/arch/mips/isa/base.isa b/src/arch/mips/isa/base.isa
index b733da7da..54647300b 100644
--- a/src/arch/mips/isa/base.isa
+++ b/src/arch/mips/isa/base.isa
@@ -1,6 +1,6 @@
 // -*- mode:c++ -*-
 
-// Copyright (c) 2003-2006 The Regents of The University of Michigan
+// Copyright (c) 2007 MIPS Technologies, Inc.
 // All rights reserved.
 //
 // Redistribution and use in source and binary forms, with or without
@@ -25,8 +25,6 @@
 // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-//
-// Authors: Korey Sewell
 
 ////////////////////////////////////////////////////////////////////
 //
@@ -38,7 +36,6 @@ output header {{
 
     using namespace MipsISA;
 
-
     /**
      * Base class for all MIPS static instructions.
      */
@@ -54,9 +51,23 @@ output header {{
 
         /// Print a register name for disassembly given the unique
         /// dependence tag number (FP or int).
-        void printReg(std::ostream &os, int reg) const;
+        void printReg(std::ostream &os, RegId reg) const;
 
-        std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+        std::string generateDisassembly(
+                Addr pc, const SymbolTable *symtab) const override;
+
+      public:
+        void
+        advancePC(MipsISA::PCState &pc) const override
+        {
+            pc.advance();
+        }
+
+        size_t
+        asBytes(void *buf, size_t max_size) override
+        {
+            return simpleAsBytes(buf, max_size, machInst);
+        }
     };
 
 }};
@@ -64,13 +75,13 @@ output header {{
 //Ouputs to decoder.cc
 output decoder {{
 
-    void MipsStaticInst::printReg(std::ostream &os, int reg) const
+    void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
     {
-        if (reg < FP_Base_DepTag) {
-            ccprintf(os, "r%d", reg);
+        if (reg.isIntReg()) {
+            ccprintf(os, "r%d", reg.index());
         }
         else {
-            ccprintf(os, "f%d", reg - FP_Base_DepTag);
+            ccprintf(os, "f%d", reg.index());
         }
     }
 
@@ -80,22 +91,28 @@ output decoder {{
 
         ccprintf(ss, "%-10s ", mnemonic);
 
-        if(_numDestRegs > 0){
-            printReg(ss, _destRegIdx[0]);
-        }
-
-        if(_numSrcRegs > 0) {
-            ss << ", ";
-            printReg(ss, _srcRegIdx[0]);
+        // Need to find standard way to not print
+        // this info. Maybe add bool variable to
+        // class?
+        if (strcmp(mnemonic, "syscall") != 0) {
+            if(_numDestRegs > 0){
+                printReg(ss, _destRegIdx[0]);
+            }
+
+            if(_numSrcRegs > 0) {
+                ss << ", ";
+                printReg(ss, _srcRegIdx[0]);
+            }
+
+            if(_numSrcRegs > 1) {
+                ss << ", ";
+                printReg(ss, _srcRegIdx[1]);
+            }
         }
 
-        if(_numSrcRegs > 1) {
-            ss << ", ";
-            printReg(ss, _srcRegIdx[1]);
-        }
-
-
-        if(mnemonic == "sll" || mnemonic == "sra"){
+        // Should we define a separate inst. class
+        // just for two insts?
+        if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
             ccprintf(ss,", %d",SA);
         }