X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Farch%2Friscv%2Finterrupts.hh;h=bf9f2a369a849be04b9881b590af6509447945da;hb=477001c06bf5da3243f87ea81d366d8099c59628;hp=5fa6d782a8a62db4977fde2c775a0943af05c2a5;hpb=990b7a7f114a1d4f6da434eb0288626a6d6b29ec;p=gem5.git diff --git a/src/arch/riscv/interrupts.hh b/src/arch/riscv/interrupts.hh index 5fa6d782a..bf9f2a369 100644 --- a/src/arch/riscv/interrupts.hh +++ b/src/arch/riscv/interrupts.hh @@ -53,7 +53,6 @@ namespace RiscvISA { class Interrupts : public BaseInterrupts { private: - BaseCPU * cpu; std::bitset ip; std::bitset ie; @@ -66,12 +65,10 @@ class Interrupts : public BaseInterrupts return dynamic_cast(_params); } - Interrupts(Params * p) : BaseInterrupts(p), cpu(nullptr), ip(0), ie(0) {} - - void setCPU(BaseCPU * _cpu) { cpu = _cpu; } + Interrupts(Params * p) : BaseInterrupts(p), ip(0), ie(0) {} std::bitset - globalMask(ThreadContext *tc) const + globalMask() const { INTERRUPT mask = 0; STATUS status = tc->readMiscReg(MISCREG_STATUS); @@ -85,23 +82,23 @@ class Interrupts : public BaseInterrupts } bool checkInterrupt(int num) const { return ip[num] && ie[num]; } - bool checkInterrupts(ThreadContext *tc) const + bool checkInterrupts() const { - return (ip & ie & globalMask(tc)).any(); + return (ip & ie & globalMask()).any(); } Fault - getInterrupt(ThreadContext *tc) + getInterrupt() { - assert(checkInterrupts(tc)); - std::bitset mask = globalMask(tc); + assert(checkInterrupts()); + std::bitset mask = globalMask(); for (int c = 0; c < NumInterruptTypes; c++) if (checkInterrupt(c) && mask[c]) return std::make_shared(c); return NoFault; } - void updateIntrInfo(ThreadContext *tc) {} + void updateIntrInfo() {} void post(int int_num, int index)