X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Farch%2Fx86%2Fisa%2Fdecoder%2Ftwo_byte_opcodes.isa;h=6b24b38262ccad32452c8f35e2a95836ac4872f7;hb=ae4ee21ecd65107a96fe22692ed5d2ea39b873b5;hp=064f5ce86d963960ec5c928bc9b20b4c07b6e1bf;hpb=3c5988b86c9fcb06927a8e12095e278b55593911;p=gem5.git diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 064f5ce86..6b24b3826 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -93,8 +93,8 @@ 0x00: decode MODRM_REG { 0x0: sldt_Mw_or_Rv(); 0x1: str_Mw_or_Rv(); - 0x2: lldt_Mw_or_Rv(); - 0x3: ltr_Mw_or_Rv(); + 0x2: Inst::LLDT(Ew); + 0x3: Inst::LTR(Ew); 0x4: verr_Mw_or_Rv(); 0x5: verw_Mw_or_Rv(); //0x6: jmpe_Ev(); // IA-64 @@ -125,8 +125,8 @@ 0x6: skinit(); 0x7: invlpga(); } - 0x4: smsw_Rv(); - 0x6: lmsw_Rv(); + 0x4: Inst::SMSW(Rv); + 0x6: Inst::LMSW(Rv); 0x7: decode MODRM_RM { 0x0: Inst::SWAPGS(); 0x1: rdtscp(); @@ -155,8 +155,8 @@ default: Inst::LIDT(M); } } - 0x4: smsw_Mw(); - 0x6: lmsw_Mw(); + 0x4: Inst::SMSW(Mw); + 0x6: Inst::LMSW(Mw); 0x7: Inst::INVLPG(M); default: Inst::UD2(); } @@ -254,14 +254,26 @@ } } #if FULL_SYSTEM - 0x05: syscall(); + 0x05: decode MODE_MODE { + 0x0: decode MODE_SUBMODE { + 0x0: Inst::SYSCALL_64(); + 0x1: Inst::SYSCALL_COMPAT(); + } + 0x1: Inst::SYSCALL_LEGACY(); + } #else 0x05: SyscallInst::syscall('xc->syscall(Rax)', IsSyscall); #endif - 0x06: clts(); - //sandpile.org says (AMD) after sysret, so I might want to check - //if that means amd64 or AMD machines - 0x07: loadall_or_sysret(); + 0x06: Inst::CLTS(); + 0x07: decode MODE_SUBMODE { + 0x0: decode OPSIZE { + // Return to 64 bit mode. + 0x8: Inst::SYSRET_TO_64(); + // Return to compatibility mode. + default: Inst::SYSRET_TO_COMPAT(); + } + default: Inst::SYSRET_NON_64(); + } } 0x01: decode OPCODE_OP_BOTTOM3 { 0x0: invd(); @@ -269,7 +281,7 @@ 0x2: Inst::UD2(); 0x3: Inst::UD2(); 0x4: Inst::UD2(); - 0x5: prefetch(); + 0x5: Inst::PREFETCH(Mb); 0x6: FailUnimpl::femms(); 0x7: FailUnimpl::threednow(); } @@ -323,7 +335,7 @@ //group17(); 0x0: decode MODRM_REG { 0x0: prefetch_nta(); - 0x1: prefetch_t0(); + 0x1: Inst::PREFETCH_T0(Mb); 0x2: prefetch_t1(); 0x3: prefetch_t2(); default: Inst::HINT_NOP(); @@ -340,9 +352,9 @@ // no prefix 0x0: decode OPCODE_OP_BOTTOM3 { 0x0: Inst::MOV(Rd,Cd); - 0x1: mov_Rd_Dd(); + 0x1: Inst::MOV(Rd,Dd); 0x2: Inst::MOV(Cd,Rd); - 0x3: mov_Dd_Rd(); + 0x3: Inst::MOV(Dd,Rd); 0x4: mov_Rd_Td(); 0x6: mov_Td_Rd(); default: Inst::UD2(); @@ -408,7 +420,11 @@ 0x1: Inst::RDTSC(); 0x2: Inst::RDMSR(); 0x3: rdpmc(); +#if FULL_SYSTEM 0x4: sysenter(); +#else + 0x4: SyscallInst::sysenter('xc->syscall(Rax)', IsSyscall); +#endif 0x5: sysexit(); 0x6: Inst::UD2(); 0x7: getsec(); @@ -535,7 +551,7 @@ 0x0C: decode LEGACY_DECODEVAL { // no prefix 0x0: decode OPCODE_OP_BOTTOM3 { - 0x0: punpcklbw_Pq_Qd(); + 0x0: Inst::PUNPCKLBW(Pq,Qd); 0x1: punpcklwd_Pq_Qd(); 0x2: punpckldq_Pq_Qd(); 0x3: packsswb_Pq_Qq(); @@ -546,7 +562,7 @@ } // operand size (0x66) 0x1: decode OPCODE_OP_BOTTOM3 { - 0x0: punpcklbw_Vo_Wq(); + 0x0: Inst::PUNPCKLBW(Vo,Wq); 0x1: punpcklwd_Vo_Wq(); 0x2: punpckldq_Vo_Wq(); 0x3: packsswb_Vo_Wo(); @@ -564,8 +580,8 @@ 0x1: punpckhwd_Pq_Qq(); 0x2: punpckhdq_Pq_Qq(); 0x3: packssdw_Pq_Qq(); - 0x6: movd_Pq_Ed(); - 0x7: movq_Pq_Qq(); + 0x6: Inst::MOVD(Pq,Edp); + 0x7: Inst::MOVQ(Pq,Qq); default: Inst::UD2(); } // repe (0xF3) @@ -724,13 +740,13 @@ 0x0: decode OPCODE_OP_BOTTOM3 { 0x0: vmread_Ed_or_Eq_Gd_or_Gq(); 0x1: vmwrite_Gd_or_Gq_Ed_or_Eq(); - 0x6: mov_Ed_Pd(); - 0x7: mov_Qq_Pq(); + 0x6: Inst::MOVD(Edp,Pdp); + 0x7: Inst::MOVQ(Qq,Pq); default: Inst::UD2(); } // repe (0xF3) 0x4: decode OPCODE_OP_BOTTOM3 { - 0x6: movq_Vo_Mq_or_Vq_Vq(); + 0x6: Inst::MOVQ(Vq,Wq); 0x7: movdqu_Wo_Vo(); default: Inst::UD2(); } @@ -797,15 +813,15 @@ 0x1: pop_fs(); 0x2: CPUIDInst::CPUID({{ CpuidResult result; - success = doCpuid(xc->tcBase(), Rax, result); + success = doCpuid(xc->tcBase(), bits(Rax, 31, 0), result); Rax = result.rax; Rbx = result.rbx; Rcx = result.rcx; Rdx = result.rdx; }}); 0x3: Inst::BT(Ev,Gv); - 0x4: shld_Ev_Gv_Ib(); - 0x5: shld_Ev_Gv_rCl(); + 0x4: Inst::SHLD(Ev,Gv,Ib); + 0x5: Inst::SHLD(Ev,Gv); 0x6: xbts_and_cmpxchg(); 0x7: ibts_and_cmpxchg(); } @@ -814,20 +830,28 @@ 0x1: pop_gs(); 0x2: rsm_smm(); 0x3: Inst::BTS(Ev,Gv); - 0x4: shrd_Ev_Gv_Ib(); - 0x5: shrd_Ev_Gv_rCl(); + 0x4: Inst::SHRD(Ev,Gv,Ib); + 0x5: Inst::SHRD(Ev,Gv); //0x6: group16(); - 0x6: decode MODRM_MOD { - 0x3: decode MODRM_REG { - 0x5: lfence(); - 0x6: mfence(); - 0x7: sfence(); + 0x6: decode MODRM_REG { + 0x0: fxsave(); + 0x1: fxrstor(); + 0x2: ldmxcsr(); + 0x3: stmxcsr(); + 0x4: Inst::UD2(); + 0x5: decode MODRM_MOD { + 0x3: BasicOperate::LFENCE( + {{/*Nothing*/}}, IsReadBarrier); default: Inst::UD2(); } - default: decode MODRM_REG { - 0x0: fxsave(); - 0x1: fxrstor(); - 0x7: clflush(); + 0x6: decode MODRM_MOD { + 0x3: BasicOperate::MFENCE( + {{/*Nothing*/}}, IsMemBarrier); + default: Inst::UD2(); + } + 0x7: decode MODRM_MOD { + 0x3: BasicOperate::SFENCE( + {{/*Nothing*/}}, IsWriteBarrier); default: Inst::UD2(); } } @@ -870,11 +894,12 @@ 0x7: Inst::MOVSX_W(Gv,Ev); } 0x18: decode OPCODE_OP_BOTTOM3 { - 0x0: xadd_Eb_Gb(); - 0x1: xadd_Ev_Gv(); + 0x0: Inst::XADD(Eb,Gb); + 0x1: Inst::XADD(Ev,Gv); //0x7: group9(); 0x7: decode MODRM_REG { - 0x1: cmpxchg_Mq(); + //Also CMPXCHG16B + 0x1: Inst::CMPXCHG8B(Mdp); 0x6: decode LEGACY_OP { 0x1: vmclear_Mq(); default: decode LEGACY_REP { @@ -944,10 +969,7 @@ 0x3: psrlq_Vo_Wo(); 0x4: paddq_Vo_Wo(); 0x5: pmullw_Vo_Wo(); - 0x6: decode MODRM_MOD { - 0x3: movq_Vq_Vq(); - default: movq_Mq_Vq(); - } + 0x6: Inst::MOVQ(Wq,Vq); 0x7: pmovmskb_Gd_VRo(); } // repne (0xF2) @@ -1043,7 +1065,7 @@ } default: Inst::UD2(); } - 0x1E: decode OPCODE_OP_BOTTOM3 { + 0x1E: decode LEGACY_DECODEVAL { // no prefix 0x0: decode OPCODE_OP_BOTTOM3 { 0x1: psllw_Pq_Qq();