X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Farch%2Fx86%2Fisa_traits.hh;h=158e2f9e43fb35433b540bb01751df9ab143f644;hb=78524bda5606e1b60615f57ebd6bfe5bcdd71afb;hp=27f20e9b2c921122ecb079f91c5aeaaad14c0e39;hpb=ac161c1d7294fc755b6c06e23f719f577d926695;p=gem5.git

diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh
index 27f20e9b2..158e2f9e4 100644
--- a/src/arch/x86/isa_traits.hh
+++ b/src/arch/x86/isa_traits.hh
@@ -42,6 +42,7 @@
 
 #include "arch/x86/types.hh"
 #include "arch/x86/x86_traits.hh"
+#include "base/compiler.hh"
 #include "base/types.hh"
 
 namespace LittleEndianGuest {}
@@ -52,39 +53,14 @@ namespace X86ISA
     //are used.
     using namespace LittleEndianGuest;
 
-    // X86 does not have a delay slot
-#define ISA_HAS_DELAY_SLOT 0
-
-    // X86 NOP (XCHG rAX, rAX)
-    //XXX This needs to be set to an intermediate instruction struct
-    //which encodes this instruction
-
-    //4k. This value is not constant on x86.
-    const int LogVMPageSize = 12;
-    const int VMPageSize = (1 << LogVMPageSize);
-
-    const int PageShift = 12;
-    const int PageBytes = 1ULL << PageShift;
-
-    const int BranchPredAddrShiftAmt = 0;
+    const Addr PageShift = 12;
+    const Addr PageBytes = ULL(1) << PageShift;
 
     // Memory accesses can be unaligned
     const bool HasUnalignedMemAcc = true;
 
     const bool CurThreadInfoImplemented = false;
     const int CurThreadInfoReg = -1;
-
-    const ExtMachInst NoopMachInst = {
-        0x0,                            // No legacy prefixes.
-        0x0,                            // No rex prefix.
-        { 1, 0x0, 0x0, 0x90 },          // One opcode byte, 0x90.
-        0x0, 0x0,                       // No modrm or sib.
-        0, 0,                           // No immediate or displacement.
-        8, 8, 8,                        // All sizes are 8.
-        0,                              // Displacement size is 0.
-        SixtyFourBitMode                // Behave as if we're in 64 bit
-                                        // mode (this doesn't actually matter).
-    };
 }
 
 #endif // __ARCH_X86_ISATRAITS_HH__