X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Farch%2Fx86%2Ftlb.hh;h=53f61dcbc2023dab84a93f8d85b84d93e05d22b2;hb=68127ca3da543db0c2f3d131d2b3f3525a35ec50;hp=386d1635dddf184f4c8b744da1d1bdcebcf5a6af;hpb=418ddf43e645133b3693ab8bf2e56656efcf1ebf;p=gem5.git diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh index 386d1635d..53f61dcbc 100644 --- a/src/arch/x86/tlb.hh +++ b/src/arch/x86/tlb.hh @@ -2,43 +2,25 @@ * Copyright (c) 2007 The Hewlett-Packard Development Company * All rights reserved. * - * Redistribution and use of this software in source and binary forms, - * with or without modification, are permitted provided that the - * following conditions are met: + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. * - * The software must be used only for Non-Commercial Use which means any - * use which is NOT directed to receiving any direct monetary - * compensation for, or commercial advantage from such use. Illustrative - * examples of non-commercial use are academic research, personal study, - * teaching, education and corporate research & development. - * Illustrative examples of commercial use are distributing products for - * commercial advantage and providing services using the software for - * commercial advantage. - * - * If you wish to use this software or functionality therein that may be - * covered by patents for commercial use, please contact: - * Director of Intellectual Property Licensing - * Office of Strategy and Technology - * Hewlett-Packard Company - * 1501 Page Mill Road - * Palo Alto, California 94304 - * - * Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. Redistributions - * in binary form must reproduce the above copyright notice, this list of - * conditions and the following disclaimer in the documentation and/or - * other materials provided with the distribution. Neither the name of - * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer; + * redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution; + * neither the name of the copyright holders nor the names of its * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. No right of - * sublicense is granted herewith. Derivatives of the software and - * output created using the software may be prepared, but only for - * Non-Commercial Uses. Derivatives of the software may be shared with - * others provided: (i) the others agree to abide by the list of - * conditions herein which includes the Non-Commercial Use restrictions; - * and (ii) such Derivatives of the software include the above copyright - * notice to acknowledge the contribution from this software where - * applicable, this list of conditions and the disclaimer below. + * this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT @@ -58,14 +40,17 @@ #ifndef __ARCH_X86_TLB_HH__ #define __ARCH_X86_TLB_HH__ -#include "config/full_system.hh" - -#if FULL_SYSTEM +#include +#include +#include +#include "arch/generic/tlb.hh" +#include "arch/x86/regs/segment.hh" +#include "arch/x86/pagetable.hh" +#include "base/trie.hh" +#include "mem/mem_object.hh" #include "mem/request.hh" -#include "params/X86DTB.hh" -#include "params/X86ITB.hh" -#include "sim/faults.hh" +#include "params/X86TLB.hh" #include "sim/sim_object.hh" class ThreadContext; @@ -73,99 +58,111 @@ class Packet; namespace X86ISA { - struct TlbEntry + class Walker; + + class TLB : public BaseTLB { - Addr pageStart; - TlbEntry() {} - TlbEntry(Addr paddr) : pageStart(paddr) {} + protected: + friend class Walker; - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); - }; + typedef std::list EntryList; -class TLB : public SimObject -{ - public: - typedef X86TLBParams Params; - TLB(const Params *p); + uint32_t configAddress; - void dumpAll(); + public: - // Checkpointing - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); -}; + typedef X86TLBParams Params; + TLB(const Params *p); -class ITB : public TLB -{ - public: - typedef X86ITBParams Params; - ITB(const Params *p) : TLB(p) - { - } + void takeOverFrom(BaseTLB *otlb) override {} - Fault translate(RequestPtr &req, ThreadContext *tc); + TlbEntry *lookup(Addr va, bool update_lru = true); - friend class DTB; -}; + void setConfigAddress(uint32_t addr); -class DTB : public TLB -{ - public: - typedef X86DTBParams Params; - DTB(const Params *p) : TLB(p) - { - } + protected: - Fault translate(RequestPtr &req, ThreadContext *tc, bool write); -#if FULL_SYSTEM - Tick doMmuRegRead(ThreadContext *tc, Packet *pkt); - Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt); -#endif + EntryList::iterator lookupIt(Addr va, bool update_lru = true); - // Checkpointing - virtual void serialize(std::ostream &os); - virtual void unserialize(Checkpoint *cp, const std::string §ion); -}; + Walker * walker; -} + public: + Walker *getWalker(); -#else + void flushAll() override; -#include + void flushNonGlobal(); -#include "sim/host.hh" -#include "sim/tlb.hh" + void demapPage(Addr va, uint64_t asn) override; -class Checkpoint; + protected: + uint32_t size; -namespace X86ISA -{ - struct TlbEntry - { - Addr pageStart; - TlbEntry() {} - TlbEntry(Addr paddr) : pageStart(paddr) {} + std::vector tlb; - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); - }; + EntryList freeList; - class ITB : public GenericTLB - { - public: - ITB(const Params *p) : GenericTLB(p) - {} - }; + TlbEntryTrie trie; + uint64_t lruSeq; + + Fault translateInt(RequestPtr req, ThreadContext *tc); + + Fault translate(RequestPtr req, ThreadContext *tc, + Translation *translation, Mode mode, + bool &delayedResponse, bool timing); - class DTB : public GenericTLB - { public: - DTB(const Params *p) : GenericTLB(p) - {} - }; -}; -#endif + void evictLRU(); + + uint64_t + nextSeq() + { + return ++lruSeq; + } + + Fault translateAtomic(RequestPtr req, ThreadContext *tc, Mode mode); + void translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation, Mode mode); + /** Stub function for compilation support of CheckerCPU. x86 ISA does + * not support Checker model at the moment + */ + Fault translateFunctional(RequestPtr req, ThreadContext *tc, Mode mode); + + /** + * Do post-translation physical address finalization. + * + * Some addresses, for example requests going to the APIC, + * need post-translation updates. Such physical addresses are + * remapped into a "magic" part of the physical address space + * by this method. + * + * @param req Request to updated in-place. + * @param tc Thread context that created the request. + * @param mode Request type (read/write/execute). + * @return A fault on failure, NoFault otherwise. + */ + Fault finalizePhysical(RequestPtr req, ThreadContext *tc, + Mode mode) const; + + TlbEntry * insert(Addr vpn, TlbEntry &entry); + + // Checkpointing + void serialize(CheckpointOut &cp) const override; + void unserialize(CheckpointIn &cp) override; + + /** + * Get the table walker master port. This is used for + * migrating port connections during a CPU takeOverFrom() + * call. For architectures that do not have a table walker, + * NULL is returned, hence the use of a pointer rather than a + * reference. For X86 this method will always return a valid + * port pointer. + * + * @return A pointer to the walker master port + */ + BaseMasterPort *getMasterPort() override; + }; +} #endif // __ARCH_X86_TLB_HH__