X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fbase%2Fcp_annotate.hh;h=0a0cc34a359b7ebea9da0feeb538344417e28db7;hb=97887eb6dc9e548c9b5719727fd4783ef157917c;hp=13ced82de0ad0e1dfae71417b4ef2de6b63be76e;hpb=66a85b54e2f59e13b726f05a30bb115f2fb10dbc;p=gem5.git

diff --git a/src/base/cp_annotate.hh b/src/base/cp_annotate.hh
index 13ced82de..0a0cc34a3 100644
--- a/src/base/cp_annotate.hh
+++ b/src/base/cp_annotate.hh
@@ -1,4 +1,16 @@
 /*
+ * Copyright (c) 2014 ARM Limited
+ * All rights reserved.
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder.  You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
  * Copyright (c) 2006-2009 The Regents of The University of Michigan
  * All rights reserved.
  *
@@ -31,19 +43,22 @@
 #ifndef __BASE__CP_ANNOTATE_HH__
 #define __BASE__CP_ANNOTATE_HH__
 
+#include <list>
+#include <map>
+#include <memory>
+#include <string>
+#include <unordered_map>
+#include <vector>
+
 #include "base/loader/symtab.hh"
+#include "base/trace.hh"
+#include "base/types.hh"
+#include "debug/AnnotateQ.hh"
 #include "config/cp_annotate.hh"
-#include "sim/host.hh"
+#include "config/the_isa.hh"
 #include "sim/serialize.hh"
-#include "sim/startup.hh"
 #include "sim/system.hh"
 
-#include <string>
-#include <list>
-#include <vector>
-#include <map>
-#include "base/hashmap.hh"
-#include "base/trace.hh"
 #if CP_ANNOTATE
 #include "params/CPA.hh"
 #endif
@@ -108,6 +123,24 @@ class CPA
               int32_t count = 1)                                  { return; }
 };
 #else
+
+/**
+ * Provide a hash function for the CPI Id type
+ */
+namespace std {
+template <>
+struct hash<std::pair<std::string, uint64_t> >
+{
+
+    size_t
+    operator()(const std::pair<std::string, uint64_t>& x) const
+    {
+        return hash<std::string>()(x.first);
+    }
+
+};
+}
+
 class CPA : SimObject
 {
   public:
@@ -157,7 +190,7 @@ class CPA : SimObject
         }
 
     /* struct that is written to the annotation output file */
-    struct AnnotateData : public RefCounted {
+    struct AnnotateData : public Serializable {
 
         Tick time;
         uint32_t data;
@@ -169,12 +202,11 @@ class CPA : SimObject
         uint8_t  cpu;
         bool dump;
 
-        void serialize(std::ostream &os);
-        void unserialize(Checkpoint *cp, const std::string &section);
-
+        void serialize(CheckpointOut &cp) const override;
+        void unserialize(CheckpointIn &cp) override;
     };
 
-    typedef RefCountingPtr<AnnotateData> AnnDataPtr;
+    typedef std::shared_ptr<AnnotateData> AnnDataPtr;
 
     /* header for the annotation file */
     struct AnnotateHeader {
@@ -204,12 +236,12 @@ class CPA : SimObject
     uint64_t conId;
 
     // Convert state strings into state ids
-    typedef m5::hash_map<std::string, int> SCache;
+    typedef std::unordered_map<std::string, int> SCache;
     typedef std::vector<SCache> StCache;
 
     // Convert sm and queue name,id into queue id
     typedef std::pair<std::string, uint64_t> Id;
-    typedef m5::hash_map<Id, int> IdHCache;
+    typedef std::unordered_map<Id, int> IdHCache;
     typedef std::vector<IdHCache> IdCache;
 
     // Hold mapping of sm and queues to output python
@@ -234,7 +266,7 @@ class CPA : SimObject
     typedef std::map<int, int> LinkMap;
 
     // SC Links
-    typedef m5::hash_map<Id, AnnDataPtr> ScHCache;
+    typedef std::unordered_map<Id, AnnDataPtr> ScHCache;
     typedef std::vector<ScHCache> ScCache;
 
 
@@ -289,7 +321,7 @@ class CPA : SimObject
         if (smi == 0) {
             smCache[sysi-1][smid] = smi = ++numSm;
             assert(smi < 65535);
-            smMap.push_back(std::make_pair<int, Id>(sysi, smid));
+            smMap.push_back(std::make_pair(sysi, smid));
         }
         return smi;
     }
@@ -324,7 +356,7 @@ class CPA : SimObject
     {
         NameCache::iterator i = nameCache.find(s);
         if (i == nameCache.end()) {
-            nameCache[s] = std::make_pair<std::string,int>(s->name(), ++numSys);
+            nameCache[s] = std::make_pair(s->name(), ++numSys);
             i = nameCache.find(s);
             // might need to put smstackid into map here, but perhaps not
             //smStack.push_back(std::vector<int>());
@@ -353,7 +385,7 @@ class CPA : SimObject
             qBytes.push_back(0);
             qData.push_back(AnnotateList());
             numQ[sys-1]++;
-            qMap.push_back(std::make_pair<int, Id>(sys, qid));
+            qMap.push_back(std::make_pair(sys, qid));
         }
         return qi;
     }
@@ -407,7 +439,7 @@ class CPA : SimObject
         int smi = getSm(sysi, sm, frame);
         add(OP_BEGIN, FL_HW | f, 0, smi, getSt(sm, st));
         if (f & FL_BAD)
-            warn("BAD state encountered: at cycle %d: %s\n", curTick, st);
+            warn("BAD state encountered: at cycle %d: %s\n", curTick(), st);
     }
 
     inline void hwQ(flags f, System *sys, uint64_t frame, std::string sm, 
@@ -493,11 +525,7 @@ class CPA : SimObject
     CPA(Params *p);
     void startup();
 
-    // This code is ISA specific and will need to be changed
-    // if the annotation code is used for something other than Alpha
-    inline uint64_t getFrame(ThreadContext *tc)
-        { return (tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23) & 
-                ~ULL(0x3FFF)); }
+    uint64_t getFrame(ThreadContext *tc);
 
     static bool available()  { return true; }
 
@@ -512,9 +540,8 @@ class CPA : SimObject
     void dump(bool all);
     void dumpKey();
 
-    void serialize(std::ostream &os);
-    void unserialize(Checkpoint *cp, const std::string &section);
-
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 };
 #endif // !CP_ANNOTATE