X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fbroadcom%2Fcompiler%2Fqpu_schedule.c;h=9f11fe27eb869dc5631cb7adc5434cd5bf93a632;hb=4cf702c3326264c616c112280fe8947bfcc5eb11;hp=0f8001ff52d24889df2e74625a3bf62ebab4fc9d;hpb=f72820c851858819b6abf28bd75494f3c4bb7057;p=mesa.git diff --git a/src/broadcom/compiler/qpu_schedule.c b/src/broadcom/compiler/qpu_schedule.c index 0f8001ff52d..9f11fe27eb8 100644 --- a/src/broadcom/compiler/qpu_schedule.c +++ b/src/broadcom/compiler/qpu_schedule.c @@ -37,18 +37,16 @@ #include "qpu/qpu_disasm.h" #include "v3d_compiler.h" #include "util/ralloc.h" +#include "util/dag.h" static bool debug; struct schedule_node_child; struct schedule_node { + struct dag_node dag; struct list_head link; struct qinst *inst; - struct schedule_node_child *children; - uint32_t child_count; - uint32_t child_array_size; - uint32_t parent_count; /* Longest cycles + instruction_latency() of any parent of this node. */ uint32_t unblocked_time; @@ -67,11 +65,6 @@ struct schedule_node { uint32_t latency; }; -struct schedule_node_child { - struct schedule_node *node; - bool write_after_read; -}; - /* When walking the instructions in reverse, we need to swap before/after in * add_dep(). */ @@ -79,6 +72,7 @@ enum direction { F, R }; struct schedule_state { const struct v3d_device_info *devinfo; + struct dag *dag; struct schedule_node *last_r[6]; struct schedule_node *last_rf[64]; struct schedule_node *last_sf; @@ -101,37 +95,17 @@ add_dep(struct schedule_state *state, bool write) { bool write_after_read = !write && state->dir == R; + void *edge_data = (void *)(uintptr_t)write_after_read; if (!before || !after) return; assert(before != after); - if (state->dir == R) { - struct schedule_node *t = before; - before = after; - after = t; - } - - for (int i = 0; i < before->child_count; i++) { - if (before->children[i].node == after && - (before->children[i].write_after_read == write_after_read)) { - return; - } - } - - if (before->child_array_size <= before->child_count) { - before->child_array_size = MAX2(before->child_array_size * 2, 16); - before->children = reralloc(before, before->children, - struct schedule_node_child, - before->child_array_size); - } - - before->children[before->child_count].node = after; - before->children[before->child_count].write_after_read = - write_after_read; - before->child_count++; - after->parent_count++; + if (state->dir == F) + dag_add_edge(&before->dag, &after->dag, edge_data); + else + dag_add_edge(&after->dag, &before->dag, edge_data); } static void @@ -154,6 +128,9 @@ add_write_dep(struct schedule_state *state, static bool qpu_inst_is_tlb(const struct v3d_qpu_instr *inst) { + if (inst->sig.ldtlb || inst->sig.ldtlbu) + return true; + if (inst->type != V3D_QPU_INSTR_TYPE_ALU) return false; @@ -179,7 +156,10 @@ process_mux_deps(struct schedule_state *state, struct schedule_node *n, add_read_dep(state, state->last_rf[n->inst->qpu.raddr_a], n); break; case V3D_QPU_MUX_B: - add_read_dep(state, state->last_rf[n->inst->qpu.raddr_b], n); + if (!n->inst->qpu.sig.small_imm) { + add_read_dep(state, + state->last_rf[n->inst->qpu.raddr_b], n); + } break; default: add_read_dep(state, state->last_r[mux - V3D_QPU_MUX_R0], n); @@ -402,7 +382,7 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n) add_write_dep(state, &state->last_tmu_config, n); if (inst->sig.ldtlb | inst->sig.ldtlbu) - add_read_dep(state, state->last_tlb, n); + add_write_dep(state, &state->last_tlb, n); if (inst->sig.ldvpm) { add_write_dep(state, &state->last_vpm_read, n); @@ -415,7 +395,7 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n) } /* inst->sig.ldunif or sideband uniform read */ - if (qinst->uniform != ~0) + if (vir_has_uniform(qinst)) add_write_dep(state, &state->last_unif, n); if (v3d_qpu_reads_flags(inst)) @@ -425,11 +405,13 @@ calculate_deps(struct schedule_state *state, struct schedule_node *n) } static void -calculate_forward_deps(struct v3d_compile *c, struct list_head *schedule_list) +calculate_forward_deps(struct v3d_compile *c, struct dag *dag, + struct list_head *schedule_list) { struct schedule_state state; memset(&state, 0, sizeof(state)); + state.dag = dag; state.devinfo = c->devinfo; state.dir = F; @@ -438,23 +420,28 @@ calculate_forward_deps(struct v3d_compile *c, struct list_head *schedule_list) } static void -calculate_reverse_deps(struct v3d_compile *c, struct list_head *schedule_list) +calculate_reverse_deps(struct v3d_compile *c, struct dag *dag, + struct list_head *schedule_list) { - struct list_head *node; struct schedule_state state; memset(&state, 0, sizeof(state)); + state.dag = dag; state.devinfo = c->devinfo; state.dir = R; - for (node = schedule_list->prev; schedule_list != node; node = node->prev) { + list_for_each_entry_rev(struct schedule_node, node, schedule_list, + link) { calculate_deps(&state, (struct schedule_node *)node); } } struct choose_scoreboard { + struct dag *dag; int tick; int last_magic_sfu_write_tick; + int last_stallable_sfu_reg; + int last_stallable_sfu_tick; int last_ldvary_tick; int last_uniforms_reset_tick; int last_thrsw_tick; @@ -546,6 +533,38 @@ pixel_scoreboard_too_soon(struct choose_scoreboard *scoreboard, return (scoreboard->tick == 0 && qpu_inst_is_tlb(inst)); } +static bool +qpu_instruction_uses_rf(const struct v3d_qpu_instr *inst, + uint32_t waddr) { + + if (inst->type != V3D_QPU_INSTR_TYPE_ALU) + return false; + + if (v3d_qpu_uses_mux(inst, V3D_QPU_MUX_A) && + inst->raddr_a == waddr) + return true; + + if (v3d_qpu_uses_mux(inst, V3D_QPU_MUX_B) && + !inst->sig.small_imm && (inst->raddr_b == waddr)) + return true; + + return false; +} + +static bool +mux_read_stalls(struct choose_scoreboard *scoreboard, + const struct v3d_qpu_instr *inst) +{ + return scoreboard->tick == scoreboard->last_stallable_sfu_tick + 1 && + qpu_instruction_uses_rf(inst, + scoreboard->last_stallable_sfu_reg); +} + +/* We define a max schedule priority to allow negative priorities as result of + * substracting this max when an instruction stalls. So instructions that + * stall have lower priority than regular instructions. */ +#define MAX_SCHEDULE_PRIORITY 16 + static int get_instruction_priority(const struct v3d_qpu_instr *inst) { @@ -564,10 +583,6 @@ get_instruction_priority(const struct v3d_qpu_instr *inst) return next_score; next_score++; - /* XXX perf: We should schedule SFU ALU ops so that the reader is 2 - * instructions after the producer if possible, not just 1. - */ - /* Default score for things that aren't otherwise special. */ baseline_score = next_score; next_score++; @@ -577,6 +592,9 @@ get_instruction_priority(const struct v3d_qpu_instr *inst) return next_score; next_score++; + /* We should increase the maximum if we assert here */ + assert(next_score < MAX_SCHEDULE_PRIORITY); + return baseline_score; } @@ -622,6 +640,37 @@ qpu_accesses_peripheral(const struct v3d_qpu_instr *inst) inst->sig.wrtmuc); } +static bool +qpu_compatible_peripheral_access(const struct v3d_device_info *devinfo, + const struct v3d_qpu_instr *a, + const struct v3d_qpu_instr *b) +{ + const bool a_uses_peripheral = qpu_accesses_peripheral(a); + const bool b_uses_peripheral = qpu_accesses_peripheral(b); + + /* We can always do one peripheral access per instruction. */ + if (!a_uses_peripheral || !b_uses_peripheral) + return true; + + if (devinfo->ver < 41) + return false; + + /* V3D 4.1 and later allow TMU read along with a VPM read or write, and + * WRTMUC with a TMU magic register write (other than tmuc). + */ + if ((a->sig.ldtmu && v3d_qpu_uses_vpm(b)) || + (b->sig.ldtmu && v3d_qpu_uses_vpm(a))) { + return true; + } + + if ((a->sig.wrtmuc && v3d_qpu_writes_tmu_not_tmuc(b)) || + (b->sig.wrtmuc && v3d_qpu_writes_tmu_not_tmuc(a))) { + return true; + } + + return false; +} + static bool qpu_merge_inst(const struct v3d_device_info *devinfo, struct v3d_qpu_instr *result, @@ -633,12 +682,7 @@ qpu_merge_inst(const struct v3d_device_info *devinfo, return false; } - /* Can't do more than one peripheral access in an instruction. - * - * XXX: V3D 4.1 allows TMU read along with a VPM read or write, and - * WRTMUC with a TMU magic register write (other than tmuc). - */ - if (qpu_accesses_peripheral(a) && qpu_accesses_peripheral(b)) + if (!qpu_compatible_peripheral_access(devinfo, a, b)) return false; struct v3d_qpu_instr merge = *a; @@ -714,7 +758,6 @@ qpu_merge_inst(const struct v3d_device_info *devinfo, static struct schedule_node * choose_instruction_to_schedule(const struct v3d_device_info *devinfo, struct choose_scoreboard *scoreboard, - struct list_head *schedule_list, struct schedule_node *prev_inst) { struct schedule_node *chosen = NULL; @@ -728,7 +771,8 @@ choose_instruction_to_schedule(const struct v3d_device_info *devinfo, return NULL; } - list_for_each_entry(struct schedule_node, n, schedule_list, link) { + list_for_each_entry(struct schedule_node, n, &scoreboard->dag->heads, + dag.link) { const struct v3d_qpu_instr *inst = &n->inst->qpu; /* Don't choose the branch instruction until it's the last one @@ -736,7 +780,7 @@ choose_instruction_to_schedule(const struct v3d_device_info *devinfo, * choose it. */ if (inst->type == V3D_QPU_INSTR_TYPE_BRANCH && - !list_is_singular(schedule_list)) { + !list_is_singular(&scoreboard->dag->heads)) { continue; } @@ -805,6 +849,18 @@ choose_instruction_to_schedule(const struct v3d_device_info *devinfo, int prio = get_instruction_priority(inst); + if (mux_read_stalls(scoreboard, inst)) { + /* Don't merge an instruction that stalls */ + if (prev_inst) + continue; + else { + /* Any instruction that don't stall will have + * higher scheduling priority */ + prio -= MAX_SCHEDULE_PRIORITY; + assert(prio < 0); + } + } + /* Found a valid instruction. If nothing better comes along, * this one works. */ @@ -840,6 +896,16 @@ update_scoreboard_for_magic_waddr(struct choose_scoreboard *scoreboard, scoreboard->last_magic_sfu_write_tick = scoreboard->tick; } +static void +update_scoreboard_for_sfu_stall_waddr(struct choose_scoreboard *scoreboard, + const struct v3d_qpu_instr *inst) +{ + if (v3d_qpu_instr_is_sfu(inst)) { + scoreboard->last_stallable_sfu_reg = inst->alu.add.waddr; + scoreboard->last_stallable_sfu_tick = scoreboard->tick; + } +} + static void update_scoreboard_for_chosen(struct choose_scoreboard *scoreboard, const struct v3d_qpu_instr *inst) @@ -853,6 +919,9 @@ update_scoreboard_for_chosen(struct choose_scoreboard *scoreboard, if (inst->alu.add.magic_write) { update_scoreboard_for_magic_waddr(scoreboard, inst->alu.add.waddr); + } else { + update_scoreboard_for_sfu_stall_waddr(scoreboard, + inst); } } @@ -871,24 +940,24 @@ update_scoreboard_for_chosen(struct choose_scoreboard *scoreboard, } static void -dump_state(const struct v3d_device_info *devinfo, - struct list_head *schedule_list) +dump_state(const struct v3d_device_info *devinfo, struct dag *dag) { - list_for_each_entry(struct schedule_node, n, schedule_list, link) { + list_for_each_entry(struct schedule_node, n, &dag->heads, dag.link) { fprintf(stderr, " t=%4d: ", n->unblocked_time); v3d_qpu_dump(devinfo, &n->inst->qpu); fprintf(stderr, "\n"); - for (int i = 0; i < n->child_count; i++) { - struct schedule_node *child = n->children[i].node; + util_dynarray_foreach(&n->dag.edges, struct dag_edge, edge) { + struct schedule_node *child = + (struct schedule_node *)edge->child; if (!child) continue; fprintf(stderr, " - "); v3d_qpu_dump(devinfo, &child->inst->qpu); fprintf(stderr, " (%d parents, %c)\n", - child->parent_count, - n->children[i].write_after_read ? 'w' : 'r'); + child->dag.parent_count, + edge->data ? 'w' : 'r'); } } } @@ -952,64 +1021,64 @@ instruction_latency(struct schedule_node *before, struct schedule_node *after) after_inst)); } + if (v3d_qpu_instr_is_sfu(before_inst)) + return 2; + return latency; } /** Recursive computation of the delay member of a node. */ static void -compute_delay(struct schedule_node *n) +compute_delay(struct dag_node *node, void *state) { - if (!n->child_count) { - n->delay = 1; - } else { - for (int i = 0; i < n->child_count; i++) { - if (!n->children[i].node->delay) - compute_delay(n->children[i].node); - n->delay = MAX2(n->delay, - n->children[i].node->delay + - instruction_latency(n, n->children[i].node)); - } + struct schedule_node *n = (struct schedule_node *)node; + + n->delay = 1; + + util_dynarray_foreach(&n->dag.edges, struct dag_edge, edge) { + struct schedule_node *child = + (struct schedule_node *)edge->child; + + n->delay = MAX2(n->delay, (child->delay + + instruction_latency(n, child))); } } +/* Removes a DAG head, but removing only the WAR edges. (dag_prune_head() + * should be called on it later to finish pruning the other edges). + */ static void -mark_instruction_scheduled(struct list_head *schedule_list, +pre_remove_head(struct dag *dag, struct schedule_node *n) +{ + list_delinit(&n->dag.link); + + util_dynarray_foreach(&n->dag.edges, struct dag_edge, edge) { + if (edge->data) + dag_remove_edge(dag, edge); + } +} + +static void +mark_instruction_scheduled(struct dag *dag, uint32_t time, - struct schedule_node *node, - bool war_only) + struct schedule_node *node) { if (!node) return; - for (int i = node->child_count - 1; i >= 0; i--) { + util_dynarray_foreach(&node->dag.edges, struct dag_edge, edge) { struct schedule_node *child = - node->children[i].node; + (struct schedule_node *)edge->child; if (!child) continue; - if (war_only && !node->children[i].write_after_read) - continue; - - /* If the requirement is only that the node not appear before - * the last read of its destination, then it can be scheduled - * immediately after (or paired with!) the thing reading the - * destination. - */ - uint32_t latency = 0; - if (!war_only) { - latency = instruction_latency(node, - node->children[i].node); - } + uint32_t latency = instruction_latency(node, child); child->unblocked_time = MAX2(child->unblocked_time, time + latency); - child->parent_count--; - if (child->parent_count == 0) - list_add(&child->link, schedule_list); - - node->children[i].node = NULL; } + dag_prune_head(dag, &node->dag); } static void @@ -1028,7 +1097,7 @@ insert_scheduled_instruction(struct v3d_compile *c, static struct qinst * vir_nop() { - struct qreg undef = { QFILE_NULL, 0 }; + struct qreg undef = vir_nop_reg(); struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef); return qinst; @@ -1223,7 +1292,6 @@ static uint32_t schedule_instructions(struct v3d_compile *c, struct choose_scoreboard *scoreboard, struct qblock *block, - struct list_head *schedule_list, enum quniform_contents *orig_uniform_contents, uint32_t *orig_uniform_data, uint32_t *next_uniform) @@ -1231,23 +1299,10 @@ schedule_instructions(struct v3d_compile *c, const struct v3d_device_info *devinfo = c->devinfo; uint32_t time = 0; - if (debug) { - fprintf(stderr, "initial deps:\n"); - dump_state(devinfo, schedule_list); - fprintf(stderr, "\n"); - } - - /* Remove non-DAG heads from the list. */ - list_for_each_entry_safe(struct schedule_node, n, schedule_list, link) { - if (n->parent_count != 0) - list_del(&n->link); - } - - while (!list_empty(schedule_list)) { + while (!list_is_empty(&scoreboard->dag->heads)) { struct schedule_node *chosen = choose_instruction_to_schedule(devinfo, scoreboard, - schedule_list, NULL); struct schedule_node *merge = NULL; @@ -1260,7 +1315,7 @@ schedule_instructions(struct v3d_compile *c, if (debug) { fprintf(stderr, "t=%4d: current list:\n", time); - dump_state(devinfo, schedule_list); + dump_state(devinfo, scoreboard->dag); fprintf(stderr, "t=%4d: chose: ", time); v3d_qpu_dump(devinfo, inst); fprintf(stderr, "\n"); @@ -1278,17 +1333,14 @@ schedule_instructions(struct v3d_compile *c, */ if (chosen) { time = MAX2(chosen->unblocked_time, time); - list_del(&chosen->link); - mark_instruction_scheduled(schedule_list, time, - chosen, true); + pre_remove_head(scoreboard->dag, chosen); while ((merge = choose_instruction_to_schedule(devinfo, scoreboard, - schedule_list, chosen))) { time = MAX2(merge->unblocked_time, time); - list_del(&merge->link); + pre_remove_head(scoreboard->dag, chosen); list_addtail(&merge->link, &merged_list); (void)qpu_merge_inst(devinfo, inst, inst, &merge->inst->qpu); @@ -1307,6 +1359,8 @@ schedule_instructions(struct v3d_compile *c, fprintf(stderr, "\n"); } } + if (mux_read_stalls(scoreboard, inst)) + c->qpu_inst_stalled_count++; } /* Update the uniform index for the rewritten location -- @@ -1334,11 +1388,10 @@ schedule_instructions(struct v3d_compile *c, * be scheduled. Update the children's unblocked time for this * DAG edge as we do so. */ - mark_instruction_scheduled(schedule_list, time, chosen, false); + mark_instruction_scheduled(scoreboard->dag, time, chosen); list_for_each_entry(struct schedule_node, merge, &merged_list, link) { - mark_instruction_scheduled(schedule_list, time, merge, - false); + mark_instruction_scheduled(scoreboard->dag, time, merge); /* The merged VIR instruction doesn't get re-added to the * block, so free it now. @@ -1380,36 +1433,36 @@ qpu_schedule_instructions_block(struct v3d_compile *c, uint32_t *next_uniform) { void *mem_ctx = ralloc_context(NULL); - struct list_head schedule_list; + scoreboard->dag = dag_create(mem_ctx); + struct list_head setup_list; - list_inithead(&schedule_list); + list_inithead(&setup_list); /* Wrap each instruction in a scheduler structure. */ - while (!list_empty(&block->instructions)) { + while (!list_is_empty(&block->instructions)) { struct qinst *qinst = (struct qinst *)block->instructions.next; struct schedule_node *n = rzalloc(mem_ctx, struct schedule_node); + dag_init_node(scoreboard->dag, &n->dag); n->inst = qinst; list_del(&qinst->link); - list_addtail(&n->link, &schedule_list); + list_addtail(&n->link, &setup_list); } - calculate_forward_deps(c, &schedule_list); - calculate_reverse_deps(c, &schedule_list); + calculate_forward_deps(c, scoreboard->dag, &setup_list); + calculate_reverse_deps(c, scoreboard->dag, &setup_list); - list_for_each_entry(struct schedule_node, n, &schedule_list, link) { - compute_delay(n); - } + dag_traverse_bottom_up(scoreboard->dag, compute_delay, NULL); uint32_t cycles = schedule_instructions(c, scoreboard, block, - &schedule_list, orig_uniform_contents, orig_uniform_data, next_uniform); ralloc_free(mem_ctx); + scoreboard->dag = NULL; return cycles; } @@ -1491,6 +1544,7 @@ v3d_qpu_schedule_instructions(struct v3d_compile *c) scoreboard.last_magic_sfu_write_tick = -10; scoreboard.last_uniforms_reset_tick = -10; scoreboard.last_thrsw_tick = -10; + scoreboard.last_stallable_sfu_tick = -10; if (debug) { fprintf(stderr, "Pre-schedule instructions\n");