X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fbroadcom%2Fqpu%2Fqpu_instr.c;h=09d06b3fa3e38b6810aa8970caf85cf6a325a012;hb=025bdbac3e09ae9bac9eefb831e9446b9574d120;hp=22f574ce5e443a1081d8f5c1e21019976656cca0;hpb=146e432b4971eb24f2b4b92a8c203bb3f66382f5;p=mesa.git diff --git a/src/broadcom/qpu/qpu_instr.c b/src/broadcom/qpu/qpu_instr.c index 22f574ce5e4..09d06b3fa3e 100644 --- a/src/broadcom/qpu/qpu_instr.c +++ b/src/broadcom/qpu/qpu_instr.c @@ -645,19 +645,10 @@ v3d_qpu_uses_tlb(const struct v3d_qpu_instr *inst) bool v3d_qpu_uses_sfu(const struct v3d_qpu_instr *inst) { - if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { - switch (inst->alu.add.op) { - case V3D_QPU_A_RECIP: - case V3D_QPU_A_RSQRT: - case V3D_QPU_A_EXP: - case V3D_QPU_A_LOG: - case V3D_QPU_A_SIN: - case V3D_QPU_A_RSQRT2: - return true; - default: - break; - } + if (v3d_qpu_instr_is_sfu(inst)) + return true; + if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { if (inst->alu.add.magic_write && v3d_qpu_magic_waddr_is_sfu(inst->alu.add.waddr)) { return true; @@ -672,6 +663,25 @@ v3d_qpu_uses_sfu(const struct v3d_qpu_instr *inst) return false; } +bool +v3d_qpu_instr_is_sfu(const struct v3d_qpu_instr *inst) +{ + if (inst->type == V3D_QPU_INSTR_TYPE_ALU) { + switch (inst->alu.add.op) { + case V3D_QPU_A_RECIP: + case V3D_QPU_A_RSQRT: + case V3D_QPU_A_EXP: + case V3D_QPU_A_LOG: + case V3D_QPU_A_SIN: + case V3D_QPU_A_RSQRT2: + return true; + default: + return false; + } + } + return false; +} + bool v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst) { @@ -682,6 +692,16 @@ v3d_qpu_writes_tmu(const struct v3d_qpu_instr *inst) v3d_qpu_magic_waddr_is_tmu(inst->alu.mul.waddr)))); } +bool +v3d_qpu_writes_tmu_not_tmuc(const struct v3d_qpu_instr *inst) +{ + return v3d_qpu_writes_tmu(inst) && + (!inst->alu.add.magic_write || + inst->alu.add.waddr != V3D_QPU_WADDR_TMUC) && + (!inst->alu.mul.magic_write || + inst->alu.mul.waddr != V3D_QPU_WADDR_TMUC); +} + bool v3d_qpu_reads_vpm(const struct v3d_qpu_instr *inst) {