X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcompiler%2Fnir%2Fnir_lower_int_to_float.c;h=0b35dc4f3f7dcad74b19d2bbf9bca62e549be9d1;hb=00b28a50b2c492eee25ef3f75538aabe1e569ff1;hp=439afa0cdbdcd2fe50a80b38ebdd3711b522b0c1;hpb=443c5a3cd62d55c7969c873d21bc1af2ee21a600;p=mesa.git diff --git a/src/compiler/nir/nir_lower_int_to_float.c b/src/compiler/nir/nir_lower_int_to_float.c index 439afa0cdbd..0b35dc4f3f7 100644 --- a/src/compiler/nir/nir_lower_int_to_float.c +++ b/src/compiler/nir/nir_lower_int_to_float.c @@ -28,99 +28,81 @@ static bool assert_ssa_def_is_not_int(nir_ssa_def *def, void *arg) { - BITSET_WORD *int_types = arg; + ASSERTED BITSET_WORD *int_types = arg; assert(!BITSET_TEST(int_types, def->index)); return true; } -static bool -rewrite_bool_ssa_def_to_float(nir_ssa_def *def, void *_progress) -{ - bool *progress = _progress; - if (def->bit_size == 1) { - def->bit_size = 32; - *progress = true; - } - return true; -} - static bool lower_alu_instr(nir_builder *b, nir_alu_instr *alu) { - const nir_op_info *op_info = &nir_op_infos[alu->op]; + const nir_op_info *info = &nir_op_infos[alu->op]; + + bool is_bool_only = alu->dest.dest.ssa.bit_size == 1; + for (unsigned i = 0; i < info->num_inputs; i++) { + if (alu->src[i].src.ssa->bit_size != 1) + is_bool_only = false; + } - b->cursor = nir_before_instr(&alu->instr); + if (is_bool_only) { + /* avoid lowering integers ops are used for booleans (ieq,ine,etc) */ + return false; + } /* Replacement SSA value */ nir_ssa_def *rep = NULL; switch (alu->op) { + case nir_op_mov: case nir_op_vec2: case nir_op_vec3: case nir_op_vec4: - /* These we expect to have integers or booleans but the opcode doesn't change */ + case nir_op_bcsel: + /* These we expect to have integers but the opcode doesn't change */ break; - case nir_op_b2f32: alu->op = nir_op_fmov; break; - case nir_op_b2i32: alu->op = nir_op_fmov; break; - case nir_op_i2f32: alu->op = nir_op_fmov; break; - case nir_op_f2i32: alu->op = nir_op_fmov; break; - case nir_op_f2i1: - case nir_op_f2b1: - case nir_op_i2b1: - rep = nir_sne(b, nir_ssa_for_alu_src(b, alu, 0), - nir_imm_float(b, 0)); - break; - - case nir_op_flt: alu->op = nir_op_slt; break; - case nir_op_fge: alu->op = nir_op_sge; break; - case nir_op_feq: alu->op = nir_op_seq; break; - case nir_op_fne: alu->op = nir_op_sne; break; - case nir_op_ilt: alu->op = nir_op_slt; break; - case nir_op_ige: alu->op = nir_op_sge; break; - case nir_op_ieq: alu->op = nir_op_seq; break; - case nir_op_ine: alu->op = nir_op_sne; break; - case nir_op_ult: alu->op = nir_op_slt; break; - case nir_op_uge: alu->op = nir_op_sge; break; - case nir_op_ineg: alu->op = nir_op_fneg; break; + case nir_op_b2i32: alu->op = nir_op_b2f32; break; + case nir_op_i2f32: alu->op = nir_op_mov; break; + case nir_op_u2f32: alu->op = nir_op_mov; break; + case nir_op_f2i32: alu->op = nir_op_ftrunc; break; + case nir_op_f2u32: alu->op = nir_op_ffloor; break; + case nir_op_i2b1: alu->op = nir_op_f2b1; break; - case nir_op_ball_fequal2: alu->op = nir_op_fall_equal2; break; - case nir_op_ball_fequal3: alu->op = nir_op_fall_equal3; break; - case nir_op_ball_fequal4: alu->op = nir_op_fall_equal4; break; - case nir_op_bany_fnequal2: alu->op = nir_op_fany_nequal2; break; - case nir_op_bany_fnequal3: alu->op = nir_op_fany_nequal3; break; - case nir_op_bany_fnequal4: alu->op = nir_op_fany_nequal4; break; - case nir_op_ball_iequal2: alu->op = nir_op_fall_equal2; break; - case nir_op_ball_iequal3: alu->op = nir_op_fall_equal3; break; - case nir_op_ball_iequal4: alu->op = nir_op_fall_equal4; break; - case nir_op_bany_inequal2: alu->op = nir_op_fany_nequal2; break; - case nir_op_bany_inequal3: alu->op = nir_op_fany_nequal3; break; - case nir_op_bany_inequal4: alu->op = nir_op_fany_nequal4; break; - - case nir_op_bcsel: alu->op = nir_op_fcsel; break; + case nir_op_ilt: alu->op = nir_op_flt; break; + case nir_op_ige: alu->op = nir_op_fge; break; + case nir_op_ieq: alu->op = nir_op_feq; break; + case nir_op_ine: alu->op = nir_op_fneu; break; + case nir_op_ult: alu->op = nir_op_flt; break; + case nir_op_uge: alu->op = nir_op_fge; break; case nir_op_iadd: alu->op = nir_op_fadd; break; case nir_op_isub: alu->op = nir_op_fsub; break; case nir_op_imul: alu->op = nir_op_fmul; break; - case nir_op_imov: alu->op = nir_op_fmov; break; - case nir_op_iand: alu->op = nir_op_fmul; break; - case nir_op_ixor: alu->op = nir_op_sne; break; - case nir_op_ior: alu->op = nir_op_fmax; break; - case nir_op_idiv: rep = nir_ftrunc(b, nir_fdiv(b, nir_ssa_for_alu_src(b, alu, 0), nir_ssa_for_alu_src(b, alu, 1))); break; - - case nir_op_inot: - rep = nir_seq(b, nir_ssa_for_alu_src(b, alu, 0), - nir_imm_float(b, 0)); - break; + case nir_op_iabs: alu->op = nir_op_fabs; break; + case nir_op_ineg: alu->op = nir_op_fneg; break; + case nir_op_imax: alu->op = nir_op_fmax; break; + case nir_op_imin: alu->op = nir_op_fmin; break; + case nir_op_umax: alu->op = nir_op_fmax; break; + case nir_op_umin: alu->op = nir_op_fmin; break; + + case nir_op_ball_iequal2: alu->op = nir_op_ball_fequal2; break; + case nir_op_ball_iequal3: alu->op = nir_op_ball_fequal3; break; + case nir_op_ball_iequal4: alu->op = nir_op_ball_fequal4; break; + case nir_op_bany_inequal2: alu->op = nir_op_bany_fnequal2; break; + case nir_op_bany_inequal3: alu->op = nir_op_bany_fnequal3; break; + case nir_op_bany_inequal4: alu->op = nir_op_bany_fnequal4; break; default: - assert(alu->dest.dest.ssa.bit_size > 1); - for (unsigned i = 0; i < op_info->num_inputs; i++) - assert(alu->src[i].src.ssa->bit_size > 1); + assert(nir_alu_type_get_base_type(info->output_type) != nir_type_int && + nir_alu_type_get_base_type(info->output_type) != nir_type_uint); + for (unsigned i = 0; i < info->num_inputs; i++) { + assert(nir_alu_type_get_base_type(info->input_types[i]) != nir_type_int && + nir_alu_type_get_base_type(info->input_types[i]) != nir_type_uint); + } return false; } @@ -128,9 +110,6 @@ lower_alu_instr(nir_builder *b, nir_alu_instr *alu) /* We've emitted a replacement instruction */ nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(rep)); nir_instr_remove(&alu->instr); - } else { - if (alu->dest.dest.ssa.bit_size == 1) - alu->dest.dest.ssa.bit_size = 32; } return true; @@ -161,11 +140,7 @@ nir_lower_int_to_float_impl(nir_function_impl *impl) case nir_instr_type_load_const: { nir_load_const_instr *load = nir_instr_as_load_const(instr); - if (load->def.bit_size == 1) { - for (unsigned i = 0; i < load->def.num_components; i++) - load->value[i].f32 = load->value[i].b ? 1.0 : 0.0; - load->def.bit_size = 32; - } else if (BITSET_TEST(int_types, load->def.index)) { + if (load->def.bit_size != 1 && BITSET_TEST(int_types, load->def.index)) { for (unsigned i = 0; i < load->def.num_components; i++) load->value[i].f32 = load->value[i].i32; } @@ -176,8 +151,6 @@ nir_lower_int_to_float_impl(nir_function_impl *impl) case nir_instr_type_ssa_undef: case nir_instr_type_phi: case nir_instr_type_tex: - nir_foreach_ssa_def(instr, rewrite_bool_ssa_def_to_float, - &progress); break; default: