X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcpu%2Finorder%2Finorder_dyn_inst.cc;h=b61beece2558fe1bdf8c76977810d5fb3a1acd7e;hb=39f314cc151b0a05ee0e654d52bad1c906fac668;hp=f65d2ea9fd249ba03117efbcc08b18d56c8900f9;hpb=b7b545bc38bcd9ee54f1b8e45064cd8b7a3070b0;p=gem5.git

diff --git a/src/cpu/inorder/inorder_dyn_inst.cc b/src/cpu/inorder/inorder_dyn_inst.cc
index f65d2ea9f..b61beece2 100644
--- a/src/cpu/inorder/inorder_dyn_inst.cc
+++ b/src/cpu/inorder/inorder_dyn_inst.cc
@@ -45,6 +45,7 @@
 #include "cpu/exetrace.hh"
 #include "debug/InOrderDynInst.hh"
 #include "mem/request.hh"
+#include "sim/full_system.hh"
 
 using namespace std;
 using namespace TheISA;
@@ -269,8 +270,6 @@ InOrderDynInst::memAccess()
 }
 
 
-#if FULL_SYSTEM
-
 Fault
 InOrderDynInst::hwrei()
 {
@@ -311,14 +310,16 @@ InOrderDynInst::simPalCheck(int palFunc)
 #endif
     return this->cpu->simPalCheck(palFunc, this->threadNumber);
 }
-#else
+
 void
 InOrderDynInst::syscall(int64_t callnum)
 {
+    if (FullSystem)
+        panic("Syscall emulation isn't available in FS mode.\n");
+
     syscallNum = callnum;
     cpu->syscallContext(NoFault, this->threadNumber, this);
 }
-#endif
 
 void
 InOrderDynInst::setSquashInfo(unsigned stage_num)