X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcpu%2Finorder%2Freg_dep_map.hh;h=fa69e22342166f7173685fccd52b36c96865226c;hb=e2dad8236a95b5d7b1c1470385d0b543d3c7af4a;hp=cb9d35bf4f014ba62e3b3067b0398ea3dbcb7cc8;hpb=4e00cc9900ec4f61899ee5be0c5b3827487e91f5;p=gem5.git

diff --git a/src/cpu/inorder/reg_dep_map.hh b/src/cpu/inorder/reg_dep_map.hh
index cb9d35bf4..fa69e2234 100644
--- a/src/cpu/inorder/reg_dep_map.hh
+++ b/src/cpu/inorder/reg_dep_map.hh
@@ -34,21 +34,23 @@
 
 #include <list>
 #include <vector>
+#include <string>
 
 #include "arch/isa_traits.hh"
 #include "config/the_isa.hh"
 #include "cpu/inorder/pipeline_traits.hh"
 
-class InOrderCPU;
-
 class RegDepMap
 {
+  public:
     typedef ThePipeline::DynInstPtr DynInstPtr;
+    typedef TheISA::RegIndex RegIndex;
+    typedef uint8_t RegType;
 
-  public:
     RegDepMap(int size = TheISA::TotalNumRegs);
+    ~RegDepMap();
 
-    ~RegDepMap() { }
+    static std::string mapNames[];
 
     std::string name();
 
@@ -60,40 +62,47 @@ class RegDepMap
     /** Insert all of a instruction's destination registers into map*/
     void insert(DynInstPtr inst);
 
-    /** Insert an instruction into a specific destination register index onto map */
-    void insert(unsigned idx, DynInstPtr inst);
-
     /** Remove all of a instruction's destination registers into map*/
     void remove(DynInstPtr inst);
 
-    /** Remove a specific instruction and destination register index from map */
-    void remove(unsigned idx, DynInstPtr inst);
-
     /** Remove Front instruction from a destination register */
-    void removeFront(unsigned idx, DynInstPtr inst);
+    void removeFront(uint8_t reg_type, RegIndex idx, DynInstPtr inst);
 
-    /** Is the current instruction able to read from this destination register? */
-    bool canRead(unsigned idx, DynInstPtr inst);
+    /** Is the current instruction able to read from this
+     *  destination register?
+     */
+    bool canRead(uint8_t reg_type, RegIndex idx, DynInstPtr inst);
 
-    /** Is the current instruction able to get a forwarded value from another instruction
-     *  for this destination register? */
-    DynInstPtr canForward(unsigned reg_idx, unsigned src_idx, DynInstPtr inst);
+    /** Is the current instruction able to get a forwarded value from
+     *  another instruction for this destination register?
+     */
+    DynInstPtr canForward(uint8_t reg_type, unsigned reg_idx,
+                          DynInstPtr inst);
 
     /** find an instruction to forward/bypass a value from */
-    DynInstPtr findBypassInst(unsigned idx);
+    DynInstPtr findBypassInst(RegIndex idx);
 
-    /** Is the current instruction able to write to this destination register? */
-    bool canWrite(unsigned idx, DynInstPtr inst);
+    /** Is the current instruction able to write to this
+     *  destination register?
+     */
+    bool canWrite(uint8_t reg_type, RegIndex idx, DynInstPtr inst);
 
     /** Size of Dependency of Map */
-    int depSize(unsigned idx);
+    int depSize(RegIndex idx);
 
     void dump();
     
-  protected:
-    // Eventually make this a map of lists for
-    // efficiency sake!
-    std::vector<std::list<DynInstPtr> > regMap;
+  private:
+    /** Insert an instruction into a specific destination register index
+     *  onto map.
+     */
+    void insert(uint8_t reg_type, RegIndex idx, DynInstPtr inst);
+
+    /** Remove a specific instruction and dest. register index from map */
+    void remove(uint8_t reg_type, RegIndex idx, DynInstPtr inst);
+
+    typedef std::vector<std::list<DynInstPtr> > DepMap;
+    std::vector<DepMap> regMap;
 
     InOrderCPU *cpu;
 };