X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcpu%2Fsimple%2Fbase.cc;h=c597ac904b4da5068129d766ffcb22792f71763d;hb=88bbabe93f339f9db301caf43bf2cca2a0e8048c;hp=825d3103f9c5c70cb1ed30fe79e171ade2f1b401;hpb=67d58e81825d7dff17def2cfeedf5d958141be55;p=gem5.git

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 825d3103f..c597ac904 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -493,7 +493,7 @@ BaseSimpleCPU::preExecute()
     // maintain $r0 semantics
     thread->setIntReg(ZeroReg, 0);
 #if THE_ISA == ALPHA_ISA
-    thread->setFloatReg(ZeroReg, 0.0);
+    thread->setFloatRegBits(ZeroReg, 0);
 #endif // ALPHA_ISA
 
     // check for instruction-count-based events