X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcpu%2Fsimple_thread.hh;h=189cbeec5ea3f5be18280b9672cb087fe18cdebd;hb=67fda02dda290d614de233846fee434b3713b1dc;hp=2b79c97081c5b2d1d5c6f6234a2373eae51cf087;hpb=2dd65dc2546216ef132e30f5c590e11e35b4ff37;p=gem5.git diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 2b79c9708..189cbeec5 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -99,7 +99,7 @@ class SimpleThread : public ThreadState typedef ThreadContext::Status Status; protected: - RegFile regs; // correct-path register context + RegFile regs; // correct-path register context public: // pointer to CPU associated with this SimpleThread @@ -163,6 +163,22 @@ class SimpleThread : public ThreadState return dtb->translate(req, tc, true); } + void demapPage(Addr vaddr, uint64_t asn) + { + itb->demapPage(vaddr, asn); + dtb->demapPage(vaddr, asn); + } + + void demapInstPage(Addr vaddr, uint64_t asn) + { + itb->demapPage(vaddr, asn); + } + + void demapDataPage(Addr vaddr, uint64_t asn) + { + dtb->demapPage(vaddr, asn); + } + #if FULL_SYSTEM int getInstAsid() { return regs.instAsid(); } int getDataAsid() { return regs.dataAsid(); } @@ -192,12 +208,11 @@ class SimpleThread : public ThreadState FunctionalPort *getPhysPort() { return physPort; } - /** Return a virtual port. If no thread context is specified then a static - * port is returned. Otherwise a port is created and returned. It must be - * deleted by deleteVirtPort(). */ - VirtualPort *getVirtPort(ThreadContext *tc); - - void delVirtPort(VirtualPort *vp); + /** Return a virtual port. This port cannot be cached locally in an object. + * After a CPU switch it may point to the wrong memory object which could + * mean stale data. + */ + VirtualPort *getVirtPort() { return virtPort; } #endif Status status() const { return _status; } @@ -394,12 +409,6 @@ class SimpleThread : public ThreadState process->syscall(callnum, tc); } #endif - - void changeRegFileContext(TheISA::RegContextParam param, - TheISA::RegContextVal val) - { - regs.changeContext(param, val); - } };