X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fcpu%2Fstatic_inst.cc;h=2c4fc8ab9bd6b258e2aba010b1c3c809523ac031;hb=60ae1d2b10002bb73b420fce91c4b74397c55457;hp=cb4a7cdf7b6a8c33a7e085cf470825ca4b6435a9;hpb=0b5cf4ba6eb2702ade2bc77c07842edd97eab264;p=gem5.git diff --git a/src/cpu/static_inst.cc b/src/cpu/static_inst.cc index cb4a7cdf7..2c4fc8ab9 100644 --- a/src/cpu/static_inst.cc +++ b/src/cpu/static_inst.cc @@ -31,18 +31,26 @@ #include #include "cpu/static_inst.hh" -#include "sim/root.hh" +#include "sim/core.hh" StaticInstPtr StaticInst::nullStaticInstPtr; // Define the decode cache hash map. StaticInst::DecodeCache StaticInst::decodeCache; +StaticInst::AddrDecodeCache StaticInst::addrDecodeCache; +StaticInst::cacheElement StaticInst::recentDecodes[2]; + +using namespace std; + +StaticInst::~StaticInst() +{ + if (cachedDisassembly) + delete cachedDisassembly; +} void StaticInst::dumpDecodeCacheStats() { - using namespace std; - cerr << "Decode hash table stats @ " << curTick << ":" << endl; cerr << "\tnum entries = " << decodeCache.size() << endl; cerr << "\tnum buckets = " << decodeCache.bucket_count() << endl; @@ -76,9 +84,33 @@ StaticInst::hasBranchTarget(Addr pc, ThreadContext *tc, Addr &tgt) const } StaticInstPtr -StaticInst::fetchMicroOp(MicroPC micropc) +StaticInst::fetchMicroop(MicroPC micropc) +{ + panic("StaticInst::fetchMicroop() called on instruction " + "that is not microcoded."); +} + +Addr +StaticInst::branchTarget(Addr branchPC) const +{ + panic("StaticInst::branchTarget() called on instruction " + "that is not a PC-relative branch."); + M5_DUMMY_RETURN; +} + +Addr +StaticInst::branchTarget(ThreadContext *tc) const { - panic("StaticInst::fetchMicroOp() called on instruction " - "that is not microcoded."); + panic("StaticInst::branchTarget() called on instruction " + "that is not an indirect branch."); + M5_DUMMY_RETURN; } +const string & +StaticInst::disassemble(Addr pc, const SymbolTable *symtab) const +{ + if (!cachedDisassembly) + cachedDisassembly = new string(generateDisassembly(pc, symtab)); + + return *cachedDisassembly; +}