X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fdev%2FEthernet.py;h=5821a3e96febb32c4b8060e39db512780a9cf479;hb=27e8f3c98a4b1c56e16ce5f80c7ad992083ccef9;hp=58708764060937e201908ea2abb712f07b273538;hpb=49490b334af3bc145071a9a81f37012e7693af59;p=gem5.git diff --git a/src/dev/Ethernet.py b/src/dev/Ethernet.py index 587087640..5821a3e96 100644 --- a/src/dev/Ethernet.py +++ b/src/dev/Ethernet.py @@ -29,29 +29,28 @@ from m5.SimObject import SimObject from m5.params import * from m5.proxy import * -from Pci import PciDevice, PciConfigData +from Pci import PciDevice -class EtherInt(SimObject): - type = 'EtherInt' +class EtherObject(SimObject): + type = 'EtherObject' abstract = True - peer = Param.EtherInt(NULL, "peer interface") -class EtherLink(SimObject): +class EtherLink(EtherObject): type = 'EtherLink' - int1 = Param.EtherInt("interface 1") - int2 = Param.EtherInt("interface 2") + int0 = Port("interface 0") + int1 = Port("interface 1") delay = Param.Latency('0us', "packet transmit delay") delay_var = Param.Latency('0ns', "packet transmit delay variability") speed = Param.NetworkBandwidth('1Gbps', "link speed") dump = Param.EtherDump(NULL, "dump object") -class EtherBus(SimObject): +class EtherBus(EtherObject): type = 'EtherBus' loopback = Param.Bool(True, "send packet back to the sending interface") dump = Param.EtherDump(NULL, "dump object") speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second") -class EtherTap(EtherInt): +class EtherTap(EtherObject): type = 'EtherTap' bufsz = Param.Int(10000, "tap buffer size") dump = Param.EtherDump(NULL, "dump object") @@ -62,7 +61,12 @@ class EtherDump(SimObject): file = Param.String("dump file") maxlen = Param.Int(96, "max portion of packet data to dump") -class IGbE(PciDevice): +class EtherDevice(PciDevice): + type = 'EtherDevice' + abstract = True + interface = Port("Ethernet Interrface") + +class IGbE(EtherDevice): type = 'IGbE' hardware_address = Param.EthernetAddr(NextEthernetAddr, "Ethernet Hardware Address") @@ -75,8 +79,6 @@ class IGbE(PciDevice): tx_desc_cache_size = Param.Int(64, "Number of enteries in the rx descriptor cache") clock = Param.Clock('500MHz', "Clock speed of the device") - -class IGbEPciData(PciConfigData): VendorID = 0x8086 DeviceID = 0x1075 SubsystemID = 0x1008 @@ -96,12 +98,15 @@ class IGbEPciData(PciConfigData): InterruptLine = 0x1e InterruptPin = 0x01 BAR0Size = '128kB' + wb_delay = Param.Latency('10ns', "delay before desc writeback occurs") + fetch_delay = Param.Latency('10ns', "delay before desc fetch occurs") + fetch_comp_delay = Param.Latency('10ns', "delay after desc fetch occurs") + wb_comp_delay = Param.Latency('10ns', "delay after desc wb occurs") + tx_read_delay = Param.Latency('0ns', "delay after tx dma read") + rx_write_delay = Param.Latency('0ns', "delay after rx dma read") -class IGbEInt(EtherInt): - type = 'IGbEInt' - device = Param.IGbE("Ethernet device of this interface") -class EtherDevBase(PciDevice): +class EtherDevBase(EtherDevice): type = 'EtherDevBase' abstract = True hardware_address = Param.EthernetAddr(NextEthernetAddr, @@ -125,7 +130,13 @@ class EtherDevBase(PciDevice): tx_thread = Param.Bool(False, "dedicated kernel threads for receive") rss = Param.Bool(False, "Receive Side Scaling") -class NSGigEPciData(PciConfigData): +class NSGigE(EtherDevBase): + type = 'NSGigE' + + dma_data_free = Param.Bool(False, "DMA of Data is free") + dma_desc_free = Param.Bool(False, "DMA of Descriptors is free") + dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") + VendorID = 0x100B DeviceID = 0x0022 Status = 0x0290 @@ -145,21 +156,27 @@ class NSGigEPciData(PciConfigData): BAR0Size = '256B' BAR1Size = '4kB' -class NSGigE(EtherDevBase): - type = 'NSGigE' - - dma_data_free = Param.Bool(False, "DMA of Data is free") - dma_desc_free = Param.Bool(False, "DMA of Descriptors is free") - dma_no_allocate = Param.Bool(True, "Should we allocate cache on read") - configdata = NSGigEPciData() +class Sinic(EtherDevBase): + type = 'Sinic' + cxx_class = 'Sinic::Device' -class NSGigEInt(EtherInt): - type = 'NSGigEInt' - device = Param.NSGigE("Ethernet device of this interface") + rx_max_copy = Param.MemorySize('1514B', "rx max copy") + tx_max_copy = Param.MemorySize('16kB', "tx max copy") + rx_max_intr = Param.UInt32(10, "max rx packets per interrupt") + rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold") + rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold") + tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold") + tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold") + virtual_count = Param.UInt32(1, "Virtualized SINIC") + zero_copy_size = Param.UInt32(64, "Bytes to copy if below threshold") + zero_copy_threshold = Param.UInt32(256, + "Only zero copy above this threshold") + zero_copy = Param.Bool(False, "Zero copy receive") + delay_copy = Param.Bool(False, "Delayed copy transmit") + virtual_addr = Param.Bool(False, "Virtual addressing") -class SinicPciData(PciConfigData): VendorID = 0x1291 DeviceID = 0x1293 Status = 0x0290 @@ -178,23 +195,4 @@ class SinicPciData(PciConfigData): InterruptPin = 0x01 BAR0Size = '64kB' -class Sinic(EtherDevBase): - type = 'Sinic' - - rx_max_copy = Param.MemorySize('1514B', "rx max copy") - tx_max_copy = Param.MemorySize('16kB', "tx max copy") - rx_max_intr = Param.UInt32(10, "max rx packets per interrupt") - rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold") - rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold") - tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold") - tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold") - virtual_count = Param.UInt32(1, "Virtualized SINIC") - zero_copy = Param.Bool(False, "Zero copy receive") - delay_copy = Param.Bool(False, "Delayed copy transmit") - virtual_addr = Param.Bool(False, "Virtual addressing") - - configdata = SinicPciData() -class SinicInt(EtherInt): - type = 'SinicInt' - device = Param.Sinic("Ethernet device of this interface")