X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fdev%2Fisa_fake.cc;h=407d08ca458bedf720f2e64aba3fa5b7f21c7110;hb=abd33d6fd26bb69d3bf53ceb6c2dc8f90d893e34;hp=21b723bdca6be5b874a9a631ac2022ce9f02c99c;hpb=eddac53ff60c579eff28134bde84783fe36d6214;p=gem5.git

diff --git a/src/dev/isa_fake.cc b/src/dev/isa_fake.cc
index 21b723bdc..407d08ca4 100644
--- a/src/dev/isa_fake.cc
+++ b/src/dev/isa_fake.cc
@@ -32,9 +32,10 @@
  * Isa Fake Device implementation
  */
 
+#include "dev/isa_fake.hh"
+
 #include "base/trace.hh"
 #include "debug/IsaFake.hh"
-#include "dev/isa_fake.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
@@ -42,11 +43,8 @@
 using namespace std;
 
 IsaFake::IsaFake(Params *p)
-    : BasicPioDevice(p)
+    : BasicPioDevice(p, p->ret_bad_addr ? 0 : p->pio_size)
 {
-    if (!p->ret_bad_addr)
-        pioSize = p->pio_size;
-
     retData8 = p->ret_data8;
     retData16 = p->ret_data16;
     retData32 = p->ret_data32;
@@ -56,8 +54,8 @@ IsaFake::IsaFake(Params *p)
 Tick
 IsaFake::read(PacketPtr pkt)
 {
-
     pkt->makeAtomicResponse();
+
     if (params()->warn_access != "")
         warn("Device %s accessed by read to address %#x size=%d\n",
                 name(), pkt->getAddr(), pkt->getSize());
@@ -71,19 +69,22 @@ IsaFake::read(PacketPtr pkt)
                 pkt->getAddr(), pkt->getSize());
         switch (pkt->getSize()) {
           case sizeof(uint64_t):
-             pkt->set(retData64);
+             pkt->setLE(retData64);
              break;
           case sizeof(uint32_t):
-             pkt->set(retData32);
+             pkt->setLE(retData32);
              break;
           case sizeof(uint16_t):
-             pkt->set(retData16);
+             pkt->setLE(retData16);
              break;
           case sizeof(uint8_t):
-             pkt->set(retData8);
+             pkt->setLE(retData8);
              break;
           default:
-            panic("invalid access size!\n");
+             if (params()->fake_mem)
+                 std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
+             else
+                 panic("invalid access size! Device being accessed by cache?\n");
         }
     }
     return pioDelay;
@@ -97,19 +98,19 @@ IsaFake::write(PacketPtr pkt)
         uint64_t data;
         switch (pkt->getSize()) {
           case sizeof(uint64_t):
-            data = pkt->get<uint64_t>();
+            data = pkt->getLE<uint64_t>();
             break;
           case sizeof(uint32_t):
-            data = pkt->get<uint32_t>();
+            data = pkt->getLE<uint32_t>();
             break;
           case sizeof(uint16_t):
-            data = pkt->get<uint16_t>();
+            data = pkt->getLE<uint16_t>();
             break;
           case sizeof(uint8_t):
-            data = pkt->get<uint8_t>();
+            data = pkt->getLE<uint8_t>();
             break;
           default:
-            panic("invalid access size!\n");
+            panic("invalid access size: %u\n", pkt->getSize());
         }
         warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
                 name(), pkt->getAddr(), pkt->getSize(), data);
@@ -125,16 +126,16 @@ IsaFake::write(PacketPtr pkt)
         if (params()->update_data) {
             switch (pkt->getSize()) {
               case sizeof(uint64_t):
-                retData64 = pkt->get<uint64_t>();
+                retData64 = pkt->getLE<uint64_t>();
                 break;
               case sizeof(uint32_t):
-                retData32 = pkt->get<uint32_t>();
+                retData32 = pkt->getLE<uint32_t>();
                 break;
               case sizeof(uint16_t):
-                retData16 = pkt->get<uint16_t>();
+                retData16 = pkt->getLE<uint16_t>();
                 break;
               case sizeof(uint8_t):
-                retData8 = pkt->get<uint8_t>();
+                retData8 = pkt->getLE<uint8_t>();
                 break;
               default:
                 panic("invalid access size!\n");