X-Git-Url: https://git.libre-soc.org/?a=blobdiff_plain;f=src%2Fdev%2Fsinic.hh;h=d2124d8ceaea8560838249fd77bfffd59c288694;hb=eac5eac67ae8076e934d78063a24eeef08f25413;hp=ab5d0d2589742e587ad0dd3614e32601c23b534d;hpb=26b1c455e0aed69eda0cc165b5084edb1b557c38;p=gem5.git diff --git a/src/dev/sinic.hh b/src/dev/sinic.hh index ab5d0d258..d2124d8ce 100644 --- a/src/dev/sinic.hh +++ b/src/dev/sinic.hh @@ -40,7 +40,6 @@ #include "dev/pktfifo.hh" #include "dev/sinicreg.hh" #include "params/Sinic.hh" -#include "params/SinicInt.hh" #include "sim/eventq.hh" namespace Sinic { @@ -52,7 +51,7 @@ class Base : public PciDev bool rxEnable; bool txEnable; Tick clock; - inline Tick cycles(int numCycles) const { return numCycles * clock; } + inline Tick ticks(int numCycles) const { return numCycles * clock; } protected: Tick intrDelay; @@ -84,7 +83,7 @@ class Base : public PciDev public: typedef SinicParams Params; const Params *params() const { return (const Params *)_params; } - Base(Params *p); + Base(const Params *p); }; class Device : public Base @@ -116,19 +115,24 @@ class Device : public Base uint32_t IntrMask; // 0x0c uint32_t RxMaxCopy; // 0x10 uint32_t TxMaxCopy; // 0x14 - uint32_t RxMaxIntr; // 0x18 - uint32_t VirtualCount; // 0x1c - uint32_t RxFifoSize; // 0x20 - uint32_t TxFifoSize; // 0x24 - uint32_t RxFifoMark; // 0x28 - uint32_t TxFifoMark; // 0x2c - uint64_t RxData; // 0x30 - uint64_t RxDone; // 0x38 - uint64_t RxWait; // 0x40 - uint64_t TxData; // 0x48 - uint64_t TxDone; // 0x50 - uint64_t TxWait; // 0x58 - uint64_t HwAddr; // 0x60 + uint32_t ZeroCopySize; // 0x18 + uint32_t ZeroCopyMark; // 0x1c + uint32_t VirtualCount; // 0x20 + uint32_t RxMaxIntr; // 0x24 + uint32_t RxFifoSize; // 0x28 + uint32_t TxFifoSize; // 0x2c + uint32_t RxFifoLow; // 0x30 + uint32_t TxFifoLow; // 0x34 + uint32_t RxFifoHigh; // 0x38 + uint32_t TxFifoHigh; // 0x3c + uint64_t RxData; // 0x40 + uint64_t RxDone; // 0x48 + uint64_t RxWait; // 0x50 + uint64_t TxData; // 0x58 + uint64_t TxDone; // 0x60 + uint64_t TxWait; // 0x68 + uint64_t HwAddr; // 0x70 + uint64_t RxStatus; // 0x78 } regs; struct VirtualReg { @@ -137,9 +141,9 @@ class Device : public Base uint64_t TxData; uint64_t TxDone; - PacketFifo::iterator rxPacket; - int rxPacketOffset; - int rxPacketBytes; + PacketFifo::iterator rxIndex; + unsigned rxPacketOffset; + unsigned rxPacketBytes; uint64_t rxDoneData; Counter rxUnique; @@ -151,7 +155,7 @@ class Device : public Base { } }; typedef std::vector VirtualRegs; - typedef std::list VirtualList; + typedef std::list VirtualList; Counter rxUnique; Counter txUnique; VirtualRegs virtualRegs; @@ -160,6 +164,10 @@ class Device : public Base int rxActive; VirtualList txList; + int rxBusyCount; + int rxMappedCount; + int rxDirtyCount; + uint8_t ®Data8(Addr daddr) { return *((uint8_t *)®s + daddr); } uint32_t ®Data32(Addr daddr) { return *(uint32_t *)®Data8(daddr); } uint64_t ®Data64(Addr daddr) { return *(uint64_t *)®Data8(daddr); } @@ -172,7 +180,7 @@ class Device : public Base bool rxLow; Addr rxDmaAddr; uint8_t *rxDmaData; - int rxDmaLen; + unsigned rxDmaLen; TxState txState; PacketFifo txFifo; @@ -231,7 +239,7 @@ class Device : public Base public: bool recvPacket(EthPacketPtr packet); void transferDone(); - void setInterface(Interface *i) { assert(!interface); interface = i; } + virtual EtherInt *getEthPort(const std::string &if_name, int idx); /** * DMA parameters @@ -275,34 +283,42 @@ class Device : public Base * Statistics */ private: - Stats::Scalar<> rxBytes; + Stats::Scalar rxBytes; Stats::Formula rxBandwidth; - Stats::Scalar<> rxPackets; + Stats::Scalar rxPackets; Stats::Formula rxPacketRate; - Stats::Scalar<> rxIpPackets; - Stats::Scalar<> rxTcpPackets; - Stats::Scalar<> rxUdpPackets; - Stats::Scalar<> rxIpChecksums; - Stats::Scalar<> rxTcpChecksums; - Stats::Scalar<> rxUdpChecksums; - - Stats::Scalar<> txBytes; + Stats::Scalar rxIpPackets; + Stats::Scalar rxTcpPackets; + Stats::Scalar rxUdpPackets; + Stats::Scalar rxIpChecksums; + Stats::Scalar rxTcpChecksums; + Stats::Scalar rxUdpChecksums; + + Stats::Scalar txBytes; Stats::Formula txBandwidth; Stats::Formula totBandwidth; Stats::Formula totPackets; Stats::Formula totBytes; Stats::Formula totPacketRate; - Stats::Scalar<> txPackets; + Stats::Scalar txPackets; Stats::Formula txPacketRate; - Stats::Scalar<> txIpPackets; - Stats::Scalar<> txTcpPackets; - Stats::Scalar<> txUdpPackets; - Stats::Scalar<> txIpChecksums; - Stats::Scalar<> txTcpChecksums; - Stats::Scalar<> txUdpChecksums; + Stats::Scalar txIpPackets; + Stats::Scalar txTcpPackets; + Stats::Scalar txUdpPackets; + Stats::Scalar txIpChecksums; + Stats::Scalar txTcpChecksums; + Stats::Scalar txUdpChecksums; + + Stats::Scalar totalVnicDistance; + Stats::Scalar numVnicDistance; + Stats::Scalar maxVnicDistance; + Stats::Formula avgVnicDistance; + + int _maxVnicDistance; public: virtual void regStats(); + virtual void resetStats(); /** * Serialization stuff @@ -312,7 +328,7 @@ class Device : public Base virtual void unserialize(Checkpoint *cp, const std::string §ion); public: - Device(Params *p); + Device(const Params *p); ~Device(); }; @@ -326,7 +342,8 @@ class Interface : public EtherInt public: Interface(const std::string &name, Device *d) - : EtherInt(name), dev(d) { dev->setInterface(this); } + : EtherInt(name), dev(d) + { } virtual bool recvPacket(EthPacketPtr pkt) { return dev->recvPacket(pkt); } virtual void sendDone() { dev->transferDone(); }